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The front-end data conversion and readout electronics for the CMS ECAL upgrade

The High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with 13 bit resolution. Therefore, a high-spee...

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Autor principal: Mazza, Gianni
Lenguaje:eng
Publicado: 2017
Materias:
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/13/03/C03003
http://cds.cern.ch/record/2299847
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author Mazza, Gianni
author_facet Mazza, Gianni
author_sort Mazza, Gianni
collection CERN
description The High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with 13 bit resolution. Therefore, a high-speed, high-resolution ADC is required. Moreover, each readout channel will produce 2.08 Gb/s, thus requiring fast data transmission circuitry. A new readout architecture, based on two 12 bit, 160 MS/s ADCs, lossless data compression algorithms and fast serial links have been developed for the ECAL upgrade. These functions will be integrated in a single ASIC which is currently under design in a commercial CMOS 65 nm technology using radiation damage mitigation techniques.
id cern-2299847
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2017
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spelling cern-22998472019-09-30T06:29:59Zdoi:10.1088/1748-0221/13/03/C03003http://cds.cern.ch/record/2299847engMazza, GianniThe front-end data conversion and readout electronics for the CMS ECAL upgradeDetectors and Experimental TechniquesThe High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with 13 bit resolution. Therefore, a high-speed, high-resolution ADC is required. Moreover, each readout channel will produce 2.08 Gb/s, thus requiring fast data transmission circuitry. A new readout architecture, based on two 12 bit, 160 MS/s ADCs, lossless data compression algorithms and fast serial links have been developed for the ECAL upgrade. These functions will be integrated in a single ASIC which is currently under design in a commercial CMOS 65 nm technology using radiation damage mitigation techniques.CMS-CR-2017-443oai:cds.cern.ch:22998472017-12-01
spellingShingle Detectors and Experimental Techniques
Mazza, Gianni
The front-end data conversion and readout electronics for the CMS ECAL upgrade
title The front-end data conversion and readout electronics for the CMS ECAL upgrade
title_full The front-end data conversion and readout electronics for the CMS ECAL upgrade
title_fullStr The front-end data conversion and readout electronics for the CMS ECAL upgrade
title_full_unstemmed The front-end data conversion and readout electronics for the CMS ECAL upgrade
title_short The front-end data conversion and readout electronics for the CMS ECAL upgrade
title_sort front-end data conversion and readout electronics for the cms ecal upgrade
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.1088/1748-0221/13/03/C03003
http://cds.cern.ch/record/2299847
work_keys_str_mv AT mazzagianni thefrontenddataconversionandreadoutelectronicsforthecmsecalupgrade
AT mazzagianni frontenddataconversionandreadoutelectronicsforthecmsecalupgrade