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Resource efficient LDPC decoders: from algorithms to hardware architectures
| Autores principales: | , |
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| Lenguaje: | eng |
| Publicado: |
Elsevier Science
2017
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/2303912 |
| _version_ | 1780957413423185920 |
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| author | Chandrasetty, Vikram Arkalgud Aziz, Sayed Mahfuzul |
| author_facet | Chandrasetty, Vikram Arkalgud Aziz, Sayed Mahfuzul |
| author_sort | Chandrasetty, Vikram Arkalgud |
| collection | CERN |
| id | cern-2303912 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 2017 |
| publisher | Elsevier Science |
| record_format | invenio |
| spelling | cern-23039122021-04-21T18:54:28Zhttp://cds.cern.ch/record/2303912engChandrasetty, Vikram ArkalgudAziz, Sayed MahfuzulResource efficient LDPC decoders: from algorithms to hardware architecturesComputing and ComputersElsevier Scienceoai:cds.cern.ch:23039122017 |
| spellingShingle | Computing and Computers Chandrasetty, Vikram Arkalgud Aziz, Sayed Mahfuzul Resource efficient LDPC decoders: from algorithms to hardware architectures |
| title | Resource efficient LDPC decoders: from algorithms to hardware architectures |
| title_full | Resource efficient LDPC decoders: from algorithms to hardware architectures |
| title_fullStr | Resource efficient LDPC decoders: from algorithms to hardware architectures |
| title_full_unstemmed | Resource efficient LDPC decoders: from algorithms to hardware architectures |
| title_short | Resource efficient LDPC decoders: from algorithms to hardware architectures |
| title_sort | resource efficient ldpc decoders: from algorithms to hardware architectures |
| topic | Computing and Computers |
| url | http://cds.cern.ch/record/2303912 |
| work_keys_str_mv | AT chandrasettyvikramarkalgud resourceefficientldpcdecodersfromalgorithmstohardwarearchitectures AT azizsayedmahfuzul resourceefficientldpcdecodersfromalgorithmstohardwarearchitectures |