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ATLAS Level-1 Topological Trigger
The ATLAS experiment has introduced and recently commissioned a completely new hardware sub-system of its first-level trigger: the topological processor (L1Topo). L1Topo consist of two AdvancedTCA blades mounting state-of-the-art FPGA processors, providing high input bandwidth (up to 4 Gb/s) and low...
| Autores principales: | , |
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| Lenguaje: | eng |
| Publicado: |
2018
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/2304198 |