Test-beam results of a SOI pixel detector prototype

This paper presents the test-beam results of a monolithic pixel-detector prototype fabricated in 200nm Silicon-On-Insulator (SOI) CMOS technology. The SOI detector was tested at the CERN SPS H6 beam line. The detector is fabricated on a 500 μμm thick high-resistivity float-zone n-type (FZ-n) wafer. The pixel size is 30 $\mu$m $\times$ 30 $\mu$m and its readout uses a source-follower configuration. The test-beam data are analysed in order to compute the spatial resolution and detector efficiency. The analysis chain includes pedestal and noise calculation, cluster reconstruction, as well as alignment and $\eta$-correction for non-linear charge sharing. The results show a spatial resolution of about 4.3 $\mu$m.