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A high performance single chip processing unit for parallel processing and data acquisition systems
Autores principales: | Bastianello, G, Battista, C, Cabasino, S, Marzano, F, Paolucci, P S, Pech, J, Sarno, R, Todesco, G M, Torelli, M, Tross, W, Vicini, P, Borgognoni, R, Lai, A, Tripiccione, R, Cabibbo, Nicola, Fucci, A |
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Lenguaje: | eng |
Publicado: |
1993
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1016/0168-9002(93)91058-U http://cds.cern.ch/record/247409 |
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