The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade.

The nSYNC chip is a radiation tolerant custom ASIC, developed in UMC 130 nm technology, and the main component of the new readout electronics for the LHCb Muon Detector Upgrade. The nSYNC has been developed in order to implement all the required functionalities for the readout upgrade in terms of ti...

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Detalles Bibliográficos
Autores principales: Cadeddu, Sandro, Casu, Luigi, Brundu, Davide, Cardini, Alessandro, Lai, Adriano, Loi, Angelo
Lenguaje:eng
Publicado: 2018
Materias:
Particle Physics - Experiment
Acceso en línea:https://dx.doi.org/10.1016/j.nima.2018.09.149
http://cds.cern.ch/record/2628503
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author Cadeddu, Sandro
Casu, Luigi
Brundu, Davide
Cardini, Alessandro
Lai, Adriano
Loi, Angelo
author_facet Cadeddu, Sandro
Casu, Luigi
Brundu, Davide
Cardini, Alessandro
Lai, Adriano
Loi, Angelo
author_sort Cadeddu, Sandro
collection CERN
description The nSYNC chip is a radiation tolerant custom ASIC, developed in UMC 130 nm technology, and the main component of the new readout electronics for the LHCb Muon Detector Upgrade. The nSYNC has been developed in order to implement all the required functionalities for the readout upgrade in terms of timing alignement and measurements, and equipped also with control and monitoring features. The internal architecture of the chip, the data flow and test results on different nSYNC functionalities are presented.
id cern-2628503
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2018
record_format invenio
spelling cern-26285032019-09-30T06:29:59Zdoi:10.1016/j.nima.2018.09.149http://cds.cern.ch/record/2628503engCadeddu, SandroCasu, LuigiBrundu, DavideCardini, AlessandroLai, AdrianoLoi, AngeloThe nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade.Particle Physics - ExperimentThe nSYNC chip is a radiation tolerant custom ASIC, developed in UMC 130 nm technology, and the main component of the new readout electronics for the LHCb Muon Detector Upgrade. The nSYNC has been developed in order to implement all the required functionalities for the readout upgrade in terms of timing alignement and measurements, and equipped also with control and monitoring features. The internal architecture of the chip, the data flow and test results on different nSYNC functionalities are presented.LHCb-PROC-2018-014CERN-LHCb-PROC-2018-014oai:cds.cern.ch:26285032018-06-30
spellingShingle Particle Physics - Experiment
Cadeddu, Sandro
Casu, Luigi
Brundu, Davide
Cardini, Alessandro
Lai, Adriano
Loi, Angelo
The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade.
title The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade.
title_full The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade.
title_fullStr The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade.
title_full_unstemmed The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade.
title_short The nSYNC ASIC for the new readout electronics of the LHCb Muon Detector Upgrade.
title_sort nsync asic for the new readout electronics of the lhcb muon detector upgrade.
topic Particle Physics - Experiment
url https://dx.doi.org/10.1016/j.nima.2018.09.149
http://cds.cern.ch/record/2628503
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