The ATLAS Level-1 Muon Topological Trigger Information for Run 2 of the LHC

Modern high-energy physics experiments, such as those taking place at the LHC (Large Hadron Collider), require the use of advanced electronic instrumentation to cope with the high number of sensor channels operating at a high rate. During the first data taking run of the LHC, the proton-proton luminosity delivered to ATLAS and CMS, two of its four detectors, made possible the discovery of the Higgs boson. For the second LHC data-taking run, the first level trigger of ATLAS will use the geometry of particle tracks (topological information) aiming at the increase of the trigger efficiency of several physics processes, such as the B-hadrons decaying to two low-pT muons and lepton flavor violation τ decays. For this purpose, a dedicated Topological Processor (L1Topo) was developed to process topological algorithms and provide additional trigger inputs to the CTP (Central Trigger Processor), which is in charge of reducing the collision rate of 40 MHz to a Level-1 event rate of 75 kHz based on event information from the calorimeters and muon spectrometer. This dissertation presents the upgrade of the existing Muon-to-Central-Trigger-Processor Interface (MUCTPI) with the objective of transmitting muon topological information to L1Topo through electrical trigger outputs initially intended, solely, for testing and monitoring purposes. As a first step, an error-rate test system has been developed and its results have demonstrated the possibility of reliably transmitting data through the trigger outputs at 320 MHz, eight times the nominal transmission rate (40 MHz). In addition, here is presented the FPGA firmware developments for the MUCTPI to encode and transmit the muon topological information. Furthermore, this work includes computer simulations of the MUCTPI firmware operation, hardware tests using the debugging interface, and integration tests with L1Topo processor, which have demonstrated the functionality of the upgraded MUCTPI system.