Jets and topological trigger selection performed with the last generation Xilinx FPGA

For LHC Run3, ATLAS is planning a major detector and trigger upgrade. The new Feature EXtractors (FEXs) system will allow to reconstruct different physics objects for the Level-1 calorimeter trigger selection. This includes a Jet FEX, which will identify small/large area jets and MET. An upgraded L1 Topological Processor will allow to select interesting physics events applying topological constraints. To achieve up to ~3 Tb/s input bandwidth and substantial processing power with tight latency budget of <390 ns, the trigger boards host up to four Ultrascale+ FPGAs. Design and test results of full-scale prototypes from integrated tests will be reported.