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The ATLAS Level-1 Topological Processor: from design to routine usage in Run-2
During Run-2 the LHC is providing proton-proton collisions to the ATLAS experiment with high luminosity (up to 2.06x10^34), placing stringent operational and physical requirements on the ATLAS trigger system in order to reduce the 40 MHz collision rate to a manageable event storage rate of 1 kHz, wh...
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Lenguaje: | eng |
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2018
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Acceso en línea: | http://cds.cern.ch/record/2644137 |
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author | Simoniello, Rosa |
author_facet | Simoniello, Rosa |
author_sort | Simoniello, Rosa |
collection | CERN |
description | During Run-2 the LHC is providing proton-proton collisions to the ATLAS experiment with high luminosity (up to 2.06x10^34), placing stringent operational and physical requirements on the ATLAS trigger system in order to reduce the 40 MHz collision rate to a manageable event storage rate of 1 kHz, while not rejecting interesting physics events. The Level-1 trigger is the first rate-reducing step in the ATLAS trigger system with an output rate of 100 kHz and decision latency of less than 2.5 microseconds. An important role is played by its newly commissioned component: the L1 Topological Processor (L1Topo). This innovative system consists of two blades designed in AdvancedTCA form factor, mounting four individual state-of-the-art processors, and providing high input bandwidth and low latency data processing. Up to 128 topological trigger algorithms can be implemented to select interesting events by applying kinematic and angular requirements on electromagnetic clusters, jets, muons and total energy. This results in a significantly improved background event rejection and improved acceptance of physics signal events, despite the increasing luminosity. This is becoming more and more important for analyses making use of low pT objects, like the Heavy Flavour and Higgs physics programme. In this talk, an overview of the L1Topo architecture, simulation and performance results during Run-2 is presented. |
id | cern-2644137 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2018 |
record_format | invenio |
spelling | cern-26441372019-09-30T06:29:59Zhttp://cds.cern.ch/record/2644137engSimoniello, RosaThe ATLAS Level-1 Topological Processor: from design to routine usage in Run-2Particle Physics - ExperimentDuring Run-2 the LHC is providing proton-proton collisions to the ATLAS experiment with high luminosity (up to 2.06x10^34), placing stringent operational and physical requirements on the ATLAS trigger system in order to reduce the 40 MHz collision rate to a manageable event storage rate of 1 kHz, while not rejecting interesting physics events. The Level-1 trigger is the first rate-reducing step in the ATLAS trigger system with an output rate of 100 kHz and decision latency of less than 2.5 microseconds. An important role is played by its newly commissioned component: the L1 Topological Processor (L1Topo). This innovative system consists of two blades designed in AdvancedTCA form factor, mounting four individual state-of-the-art processors, and providing high input bandwidth and low latency data processing. Up to 128 topological trigger algorithms can be implemented to select interesting events by applying kinematic and angular requirements on electromagnetic clusters, jets, muons and total energy. This results in a significantly improved background event rejection and improved acceptance of physics signal events, despite the increasing luminosity. This is becoming more and more important for analyses making use of low pT objects, like the Heavy Flavour and Higgs physics programme. In this talk, an overview of the L1Topo architecture, simulation and performance results during Run-2 is presented.ATL-DAQ-SLIDE-2018-930oai:cds.cern.ch:26441372018-10-18 |
spellingShingle | Particle Physics - Experiment Simoniello, Rosa The ATLAS Level-1 Topological Processor: from design to routine usage in Run-2 |
title | The ATLAS Level-1 Topological Processor: from design to routine usage in Run-2 |
title_full | The ATLAS Level-1 Topological Processor: from design to routine usage in Run-2 |
title_fullStr | The ATLAS Level-1 Topological Processor: from design to routine usage in Run-2 |
title_full_unstemmed | The ATLAS Level-1 Topological Processor: from design to routine usage in Run-2 |
title_short | The ATLAS Level-1 Topological Processor: from design to routine usage in Run-2 |
title_sort | atlas level-1 topological processor: from design to routine usage in run-2 |
topic | Particle Physics - Experiment |
url | http://cds.cern.ch/record/2644137 |
work_keys_str_mv | AT simoniellorosa theatlaslevel1topologicalprocessorfromdesigntoroutineusageinrun2 AT simoniellorosa atlaslevel1topologicalprocessorfromdesigntoroutineusageinrun2 |