Investigations into the effect of gamma irradiation on the leakage current of 130-nm readout chips for the ATLAS ITk strip detector

Central to the design of any detector system is a detailed understanding of the current and power dissipation due to the implications on power supply design, thermal management and mechanical stability. It is well documented that certain 130-nm CMOS technologies exhibit an increase in the leakage current when exposed to ionising radiation. Such 130-nm technology is employed in the readout ASICs of the ATLAS ITk Strip Tracker Upgrade. Using the so-called $\textit{ABC130}$ prototype chipset, measurements are presented which allow the parametrisation of the increase in current as a function of dose rate in the region of phase space most applicable to High-Luminosity LHC conditions. Studies investigating the batch-by-batch, chip-by-chip and wafer-by-wafer variation of the total current increase are presented which demonstrate a significant batch-by-batch variation alongside non-negligible variations within wafers. Furthermore, studies are shown investigating the long-term annealing of irradiated chips (up to four months storing chips at 80$~^\circ$C). Finally, the feasibility of pre-irradiating wafers to mitigate the current increase is demonstrated.