Characterization of the first prototype of the Silicon-Strip readout ASIC (SSA) for the CMS Outer-Tracker phase-2 upgrade

The silicon strip readout ASIC (SSA) for the CMS Outer Tracker PS module was prototyped in a \(65\,nm\) CMOS technology and characterized utilizing a custom made test bench based on the FC7 \(\mu\)TCA FPGA card. The ASIC has been evaluated and characterised under different working temperatures and radiation levels up to \(200\,Mrad\). Measurements show a front-end gain between \(35\) and \(54\,mV/fC\) and an average noise of \(<330\,e^-\), meeting the specification of noise performance. The measured peaking time for an injected charge between \(0.5\,fC\) and \(8\,fC\) is \(\approx19\,ns\) allowing to detect consecutive particle events in combination with the zero dead-cycle binary readout. The embedded trimming circuit allows to obtain a measured threshold spread smaller than \(55\,e^-\) between channels. The measured power consumption is \(\approx60\,mW\) and thus within the strict power budget of the PS modules. The performance characterization results and radiation tolerance test results of the first SSA silicon prototype are presented.