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Principles of secure processor architecture design

Detalles Bibliográficos
Autores principales: Szefer, Jakub, Martonosi, Margaret
Lenguaje:eng
Publicado: Morgan & Claypool Publishers 2018
Materias:
Acceso en línea:http://cds.cern.ch/record/2651771
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author Szefer, Jakub
Martonosi, Margaret
author_facet Szefer, Jakub
Martonosi, Margaret
author_sort Szefer, Jakub
collection CERN
id cern-2651771
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2018
publisher Morgan & Claypool Publishers
record_format invenio
spelling cern-26517712021-04-21T18:37:48Zhttp://cds.cern.ch/record/2651771engSzefer, JakubMartonosi, MargaretPrinciples of secure processor architecture designComputing and ComputersMorgan & Claypool Publishersoai:cds.cern.ch:26517712018
spellingShingle Computing and Computers
Szefer, Jakub
Martonosi, Margaret
Principles of secure processor architecture design
title Principles of secure processor architecture design
title_full Principles of secure processor architecture design
title_fullStr Principles of secure processor architecture design
title_full_unstemmed Principles of secure processor architecture design
title_short Principles of secure processor architecture design
title_sort principles of secure processor architecture design
topic Computing and Computers
url http://cds.cern.ch/record/2651771
work_keys_str_mv AT szeferjakub principlesofsecureprocessorarchitecturedesign
AT martonosimargaret principlesofsecureprocessorarchitecturedesign