Development of a real-time tracking device for the LHCb Upgrade 1b

Past experiments on b- and c-physics have provided important contributions to the understanding of CP violation and to the determination of CKM matrix parameters. Current and future experiments, such as LHCb at the LHC collider and Belle II at SuperKEKB machine, have the potential to significantly improve our knowledge on CKM parameters thanks to a huge production of b- and c-hadrons. However, because of a small signal-to-background ratio for typical interesting processes, and the limited bandwidth available for storing data, the adoption of powerful and very selective trigger systems is needed, particularly at hadron colliders. The most important discriminant for decay of b- and c-hadrons is their relatively long lifetime, that requires excellent tracking systems to discriminate interesting events from the large background. The LHCb experiment is going to increase its luminosity by a factor of 5 starting in the 2020. In this new regime, it will adopt a full software trigger running on a large PC farm, to reconstruct all tracks produced in every LHC collision, occurring at a rate of 40 MHz. This is a large step forward from the current rate of 1 MHz of reconstructed events - in addition to the luminosity increase. On account of the significant CPU time required, it is not planned to perform the reconstruction of decay products originated outside of the vertex detector (“downstream tracks”). While current reconstruction plan covers most of the decays of b- and c-particles, not having access to “downstream tracks” information at this level strongly limits the efficiency for decay modes containing neutral hadrons and long lived particles (KS 0 and Λ). This includes many interesting decays like D0 → KS KS or Λb → 3Λ. For this reason, while still maintaining a trigger strategy firmly based on software, the LHCb collaboration has recently put forward an Expression of Interest for a further upgrade of the detector [CERN-LHCC-2017-003], in which it is planned to include some specialized hardware devices that could operate a real-time reconstruction of some parts of the tracking. This relieves some of the computational burden from the CPU farm, allowing to extend the reconstruction to the downstream part of the tracker and to handle even higher beam intensities. In this thesis I have performed a study of the feasibility of performing a real-time reconstruction of downstream tracks at the earliest trigger level (the Event Builder) using a FPGA-based system organized according to the innovative “Artificial Retina” architecture. The “Artificial Retina” approach draws inspiration from the biological example of the organization of visual areas in the brain of mammals [Nucl.Instrum.Meth. A453 (2000) 425-429]. The parameter space of tracks is divided in cells, that are implemented as active computational elements, evaluating a numerical “excitation level” in a totally parallel way. The local maxima in the “excitation distribution” are also calculated by a fully parallel clustering process, that interpolates the response of adjacent cells to obtain good resolution performances while keeping the number of cells within manageable limits. A fully custom intelligent switching network provides large-volume, low-latency data distribution to the cells, exploiting to its fullest the wide bandwidth provided by optical links in programmable digital devices (FPGAs) now commercially available. This new approach has never been used in High Energy Particle experiments and currently is still in an R&D stage. With my thesis work I have contributed to its development within the INFN technological project ‘RETINA’. When I started my thesis, only a low-speed demonstrator prototype had been implemented, based on slow FPGAs from previous generation (65 nm process), whose purpose was just to test the logic functionality of the architecture implemented on a real system, with no requirements on speed. The first goal of my thesis work was to investigate whether the ‘RETINA’ system actually had the potential to process tracks with a speed sufficient for implementation of a realistic tracking system capable of operating at Level-1 of the LHC. This had never been attained before without the help of some form of time-multiplexing to reduce the rate. For this purpose, I have produced a new implementation of the system on current, much faster and bigger FPGAs (Stratix-V), to simulate the real conditions of the final device. In order to take full advantage of the performance of this new hardware prototype, I had to re-design several parts of the previous existing firmware, both the switching network and the cell processors, for optimal performance and speed, using low-level hardware description languages (VHDL). This also included change completely the interface for use on a different board, a special custom-order board aimed at the development and test of new fast ASICs projects. Testing the system with realistic simulated events in a “general-purpose” 6-layer tracking detector, I debugged and measured the throughput of the new system as a function of the occupancy of the tracker. In this way, I managed to produce in the lab a hardware prototype capable of processing events at a limit event rate of 66.67 MHz (greater than the LHC event rate of ∼ 30 MHz). Another crucial parameter of the system is the latency. In order to work as a transparent device incorporated within the Event Builder, the latency of the device has to be of the order of few μs. This is another challenging requirement, as all currently existing designs require tens of μs. After performing an optimization of the internal pipeline of the device, I managed to achieve a latency < 0.5 μs (443 ns), that fully satisfies the needs of our purpose, and is very hard to obtain using any alternative approach. Encouraged by this achievement, I proceeded to a higher-level study of the efficiency, ghost rate, and event rate of this system when applied to a generic bare-bones detector, and compared these with the performance of a software algorithm. The “Artificial Retina” showed to have similar efficiency and event rate higher of 1 − 2 order of magnitude in high-occupancy conditions, but also a higher ghost rate. For reducing the ghost rate I studied also possible optimization of the system, introducing requirements on the track χ2 computed with a linearized fit. Modern FPGA have a large number of digital signal processors (DSP) capable of floating point operation suitable for the task, and my work evidenced the necessity of adding a DSP stage to the final system. Finally, I proceeded to an even higher-level study, tackling the real configuration of the LHCb downstream tracking detector. Given the complexity of the system, I aimed at reproducing at least the 2D section of the reconstruction in the most forward Scintillating Fiber detector and compare it with the performance of the traditional CPU-based reconstruction software. This is the first proof that a reconstruction of sufficient quality is feasible, using an amount of hardware contained within reasonable practical limits. I performed both a preliminary study based on a home-made event generator, that did not include multiple scattering and the fringe magnetic field, and a more complete study based on the actual official simulation of the LHCb detector, interfaced through a custom piece of software to my own code. Both have been performed with realistic track occupancy as expected in the new beam conditions for the upcoming physics Run at LHC. Results showed an efficiency close to 95% can be achieved in this conditions, based on a number of cells that can quite reasonably be installed within the LHCb Event Builder system. The ghost rate in this simulation turned out to be quite high (∼ 50%), but this figure is similar to what obtained with software when using only a portion of the available tracking layers, and does not indicate a problem for the complete system. Finally, application to tracks from decay of interesting physics benchmark modes (D∗+ → D0[KS(π+ π− )π+ π− ]π+) have shown that the capability and momentum acceptance of the design I have developed are quite compatible with the performance required for improving the physics outcome of future runs of the LHCb experiment. In conclusion, while longer and more extensive studies are needed to include all layers of the tracking detectors, my work demonstrates that a special-purpose processor based on the “Artificial Retina” approach can be built at a reasonable cost using FPGA devices. I implemented and tested an advanced prototype, and made a series of studies on the performances of the system applied to a real case, the reconstruction of downstream tracks at LHCb Upgrade. This is a significant step towards real-time tracking at HL-LHC, a methodology that will also open the possibility to trigger purely on long-lived neutrals, increasing significantly the acceptance for some channels and expanding our physics reach.