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Digital system design with FPGA: implementation using Verilog and VHDL
| Autores principales: | , |
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| Lenguaje: | eng |
| Publicado: |
McGraw-Hill Education
2017
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/2653021 |
| _version_ | 1780961013780185088 |
|---|---|
| author | Unsalan, Cem Tar, Bora |
| author_facet | Unsalan, Cem Tar, Bora |
| author_sort | Unsalan, Cem |
| collection | CERN |
| id | cern-2653021 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 2017 |
| publisher | McGraw-Hill Education |
| record_format | invenio |
| spelling | cern-26530212021-04-21T18:37:34Zhttp://cds.cern.ch/record/2653021engUnsalan, CemTar, BoraDigital system design with FPGA: implementation using Verilog and VHDLEngineeringMcGraw-Hill Educationoai:cds.cern.ch:26530212017 |
| spellingShingle | Engineering Unsalan, Cem Tar, Bora Digital system design with FPGA: implementation using Verilog and VHDL |
| title | Digital system design with FPGA: implementation using Verilog and VHDL |
| title_full | Digital system design with FPGA: implementation using Verilog and VHDL |
| title_fullStr | Digital system design with FPGA: implementation using Verilog and VHDL |
| title_full_unstemmed | Digital system design with FPGA: implementation using Verilog and VHDL |
| title_short | Digital system design with FPGA: implementation using Verilog and VHDL |
| title_sort | digital system design with fpga: implementation using verilog and vhdl |
| topic | Engineering |
| url | http://cds.cern.ch/record/2653021 |
| work_keys_str_mv | AT unsalancem digitalsystemdesignwithfpgaimplementationusingverilogandvhdl AT tarbora digitalsystemdesignwithfpgaimplementationusingverilogandvhdl |