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A Monolithic HV/HR-MAPS Detector with a Small Pixel Size of 50 µm x 50 µm for the ATLAS Inner Tracker Upgrade

This paper presents a HV/HR-MAPS detector developed in the framework of the HV-CMOS collaboration for the ATLAS Inner Tracker update of the HL-LHC era. It was fabricated with a 150 nm HV-CMOS process which includes a layer to isolate the bulk of the PMOS transistors from the collecting node of the s...

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Autores principales: Casanova Mohr, Raimon, Casse, Gianluigi, Grinstein, Sebastian, Vilella, Eva, Voosebeld, Joost
Formato: info:eu-repo/semantics/article
Lenguaje:eng
Publicado: PoS 2019
Materias:
Acceso en línea:https://dx.doi.org/10.22323/1.313.0039
http://cds.cern.ch/record/2655736
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author Casanova Mohr, Raimon
Casse, Gianluigi
Grinstein, Sebastian
Vilella, Eva
Voosebeld, Joost
author_facet Casanova Mohr, Raimon
Casse, Gianluigi
Grinstein, Sebastian
Vilella, Eva
Voosebeld, Joost
author_sort Casanova Mohr, Raimon
collection CERN
description This paper presents a HV/HR-MAPS detector developed in the framework of the HV-CMOS collaboration for the ATLAS Inner Tracker update of the HL-LHC era. It was fabricated with a 150 nm HV-CMOS process which includes a layer to isolate the bulk of the PMOS transistors from the collecting node of the sensor. All the front-end electronics are integrated in the pixel, which is of only 50 µm x 50 µm, and include a preamplifier, shaper, discriminator and digital block with FEI3 column drain architecture.
format info:eu-repo/semantics/article
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spelling cern-26557362021-05-03T07:54:55Z doi:10.22323/1.313.0039 http://cds.cern.ch/record/2655736 eng Casanova Mohr, Raimon Casse, Gianluigi Grinstein, Sebastian Vilella, Eva Voosebeld, Joost A Monolithic HV/HR-MAPS Detector with a Small Pixel Size of 50 µm x 50 µm for the ATLAS Inner Tracker Upgrade Detectors and Experimental Techniques 6: Novel high voltage and resistive CMOS sensors This paper presents a HV/HR-MAPS detector developed in the framework of the HV-CMOS collaboration for the ATLAS Inner Tracker update of the HL-LHC era. It was fabricated with a 150 nm HV-CMOS process which includes a layer to isolate the bulk of the PMOS transistors from the collecting node of the sensor. All the front-end electronics are integrated in the pixel, which is of only 50 µm x 50 µm, and include a preamplifier, shaper, discriminator and digital block with FEI3 column drain architecture. info:eu-repo/grantAgreement/EC/FP7/654168 info:eu-repo/semantics/openAccess Education Level info:eu-repo/semantics/article http://cds.cern.ch/record/2655736 PoS PoS, (2018) pp. 039 2019
spellingShingle Detectors and Experimental Techniques
6: Novel high voltage and resistive CMOS sensors
Casanova Mohr, Raimon
Casse, Gianluigi
Grinstein, Sebastian
Vilella, Eva
Voosebeld, Joost
A Monolithic HV/HR-MAPS Detector with a Small Pixel Size of 50 µm x 50 µm for the ATLAS Inner Tracker Upgrade
title A Monolithic HV/HR-MAPS Detector with a Small Pixel Size of 50 µm x 50 µm for the ATLAS Inner Tracker Upgrade
title_full A Monolithic HV/HR-MAPS Detector with a Small Pixel Size of 50 µm x 50 µm for the ATLAS Inner Tracker Upgrade
title_fullStr A Monolithic HV/HR-MAPS Detector with a Small Pixel Size of 50 µm x 50 µm for the ATLAS Inner Tracker Upgrade
title_full_unstemmed A Monolithic HV/HR-MAPS Detector with a Small Pixel Size of 50 µm x 50 µm for the ATLAS Inner Tracker Upgrade
title_short A Monolithic HV/HR-MAPS Detector with a Small Pixel Size of 50 µm x 50 µm for the ATLAS Inner Tracker Upgrade
title_sort monolithic hv/hr-maps detector with a small pixel size of 50 µm x 50 µm for the atlas inner tracker upgrade
topic Detectors and Experimental Techniques
6: Novel high voltage and resistive CMOS sensors
url https://dx.doi.org/10.22323/1.313.0039
http://cds.cern.ch/record/2655736
http://cds.cern.ch/record/2655736
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