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Hardware Acceleration Through FPGAs - Basic Concepts (lecture 1)

<!--HTML-->FPGAs are a more and more ubiquitous technology. They offer the benefits of fast, application-tailored hardware, typically associated with ASICs, while enabling fast prototyping, upgradability and low costs. This makes them an ideal ally in HEP computing, specifically in areas where...

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Autor principal: Lopez, Giorgio
Lenguaje:eng
Publicado: 2019
Materias:
Acceso en línea:http://cds.cern.ch/record/2666397
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author Lopez, Giorgio
author_facet Lopez, Giorgio
author_sort Lopez, Giorgio
collection CERN
description <!--HTML-->FPGAs are a more and more ubiquitous technology. They offer the benefits of fast, application-tailored hardware, typically associated with ASICs, while enabling fast prototyping, upgradability and low costs. This makes them an ideal ally in HEP computing, specifically in areas where high performance is needed and/or specifications and needs may vary. The lectures will focus on the intrinsic parallel processing characteristics of FPGAs, emphasizing how they can be exploited to implement data-intensive algorithms. Focus will also be put on concepts like hardware/software partitioning (very important to help the most performing parts of the systems in collaborating with the legacy CPU oriented codebase). A simple hands on exercises session will be added to let the students get acquainted with the main tools and the VHDL language.
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spelling cern-26663972022-11-02T22:32:29Zhttp://cds.cern.ch/record/2666397engLopez, GiorgioHardware Acceleration Through FPGAs - Basic Concepts (lecture 1)Inverted CERN School of Computing 2019Inverted CSC<!--HTML-->FPGAs are a more and more ubiquitous technology. They offer the benefits of fast, application-tailored hardware, typically associated with ASICs, while enabling fast prototyping, upgradability and low costs. This makes them an ideal ally in HEP computing, specifically in areas where high performance is needed and/or specifications and needs may vary. The lectures will focus on the intrinsic parallel processing characteristics of FPGAs, emphasizing how they can be exploited to implement data-intensive algorithms. Focus will also be put on concepts like hardware/software partitioning (very important to help the most performing parts of the systems in collaborating with the legacy CPU oriented codebase). A simple hands on exercises session will be added to let the students get acquainted with the main tools and the VHDL language.oai:cds.cern.ch:26663972019
spellingShingle Inverted CSC
Lopez, Giorgio
Hardware Acceleration Through FPGAs - Basic Concepts (lecture 1)
title Hardware Acceleration Through FPGAs - Basic Concepts (lecture 1)
title_full Hardware Acceleration Through FPGAs - Basic Concepts (lecture 1)
title_fullStr Hardware Acceleration Through FPGAs - Basic Concepts (lecture 1)
title_full_unstemmed Hardware Acceleration Through FPGAs - Basic Concepts (lecture 1)
title_short Hardware Acceleration Through FPGAs - Basic Concepts (lecture 1)
title_sort hardware acceleration through fpgas - basic concepts (lecture 1)
topic Inverted CSC
url http://cds.cern.ch/record/2666397
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