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Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE

ALICE is one of the four major experiments at the Large Hadron Collider (LHC). It is the dedicated heavy-ion experiment and therefore primarily examines the Quark–Gluon Plasma. In order to prepare for the running conditions of 50 kHz lead-lead interactions at the LHC after the Long Shutdown 2 (2018–...

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Autor principal: Klewin, Sebastian
Lenguaje:eng
Publicado: 2019
Materias:
Acceso en línea:http://cds.cern.ch/record/2672439
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author Klewin, Sebastian
author_facet Klewin, Sebastian
author_sort Klewin, Sebastian
collection CERN
description ALICE is one of the four major experiments at the Large Hadron Collider (LHC). It is the dedicated heavy-ion experiment and therefore primarily examines the Quark–Gluon Plasma. In order to prepare for the running conditions of 50 kHz lead-lead interactions at the LHC after the Long Shutdown 2 (2018–2021), an extensive upgrade program is carried out. The goal of the upgrade is a continuous readout of the TPC without the need of a trigger. It is essential to reduce the enormous data rate of 3.7 TB/s, generated by the upgraded detector, already during the data taking by a factor of about 60. Otherwise the data volume would exceed the expected available bandwidth and storage capabilities. In this thesis, an online Cluster Finder (CF) was developed and implemented for FPGAs which processes the whole data volume in real-time during the read out. This is the first step in the data reduction sequence which achieves already a factor of about 5 by keeping only physically relevant information and making use of a better suited data format. In addition to the CF, also the whole data preparation chain was designed and implemented to decode the input data stream, to resort the individual channels to allow for cluster finding and to correct the detector effects in the input signals. All modules which were implemented were extensively simulated to verify their proper functionality. With this, the complete processing chain within the fpgas was prepared and validated.
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spelling cern-26724392019-09-30T06:29:59Zhttp://cds.cern.ch/record/2672439engKlewin, SebastianDevelopment of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICEDetectors and Experimental TechniquesALICE is one of the four major experiments at the Large Hadron Collider (LHC). It is the dedicated heavy-ion experiment and therefore primarily examines the Quark–Gluon Plasma. In order to prepare for the running conditions of 50 kHz lead-lead interactions at the LHC after the Long Shutdown 2 (2018–2021), an extensive upgrade program is carried out. The goal of the upgrade is a continuous readout of the TPC without the need of a trigger. It is essential to reduce the enormous data rate of 3.7 TB/s, generated by the upgraded detector, already during the data taking by a factor of about 60. Otherwise the data volume would exceed the expected available bandwidth and storage capabilities. In this thesis, an online Cluster Finder (CF) was developed and implemented for FPGAs which processes the whole data volume in real-time during the read out. This is the first step in the data reduction sequence which achieves already a factor of about 5 by keeping only physically relevant information and making use of a better suited data format. In addition to the CF, also the whole data preparation chain was designed and implemented to decode the input data stream, to resort the individual channels to allow for cluster finding and to correct the detector effects in the input signals. All modules which were implemented were extensively simulated to verify their proper functionality. With this, the complete processing chain within the fpgas was prepared and validated.CERN-THESIS-2019-028oai:cds.cern.ch:26724392019-04-23T20:16:49Z
spellingShingle Detectors and Experimental Techniques
Klewin, Sebastian
Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE
title Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE
title_full Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE
title_fullStr Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE
title_full_unstemmed Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE
title_short Development of the FPGA-based Raw Data Preprocessor for the TPC Readout Upgrade in ALICE
title_sort development of the fpga-based raw data preprocessor for the tpc readout upgrade in alice
topic Detectors and Experimental Techniques
url http://cds.cern.ch/record/2672439
work_keys_str_mv AT klewinsebastian developmentofthefpgabasedrawdatapreprocessorforthetpcreadoutupgradeinalice