Readiness of the ATLAS Tile Calorimeter link daughterboard for the High Luminosity LHC era.

The Daughterboard (DB)is the readout link and control board that interfaces the front-end and off-detector electronics of the HL-LHC ATLAS Hadronic Tile Calorimeter. The DB sends continuous high-speed readout of digitized PMT samples, while receiving and distributing configuration, control and LHC timing. A double redundant design, Xilinx SEM, TMR, FEC and CRC strategies minimize single failure points while withstanding single-event upsets and damage from minimum ionizing and hadronic radiation. We present he current results of the TID,NIEL and SEU tests performed aiming to demonstrate the readiness of the Daughterboard to withstand the radiation requirements imposed by the HL-LHC.