Implementation of a RD53A readout chain using FELIX system and the PiLUP board

RD53A is the first prototype of RD53, the pixel detector front-end chip that will be used by the ATLAS and CMS experiments at CERN during HL-LHC, starting operation in 2026. It is implemented using 65 nm technology and it transmits data using up to four lanes running at 1.28 Gbps each. This presentation will describe the implementation of a first readout chain of the RD53A using the ATLAS FELIX card. The readout chain features a third card, called PiLUP, as a protocol converter between RD53A and FELIX, with direct communication planned in future revisions.