Cargando…
Characterizing Performance Benefits of HBM2 on Intel Stratix 10 FPGAs
<!--HTML-->Suitable applications for FPGAs have traditionally been those whose architecture permit significant reuse of the on-chip memory to circumnavigate the relatively limited external memory bandwidth when compared with other acceleration technologies. Although this approach has been succ...
Autores principales: | , |
---|---|
Lenguaje: | eng |
Publicado: |
2019
|
Materias: | |
Acceso en línea: | http://cds.cern.ch/record/2691450 |
_version_ | 1780963856326066176 |
---|---|
author | De Matteis, Tiziano Chamberlain, Richard |
author_facet | De Matteis, Tiziano Chamberlain, Richard |
author_sort | De Matteis, Tiziano |
collection | CERN |
description | <!--HTML-->Suitable applications for FPGAs have traditionally been those whose architecture permit significant reuse of the on-chip memory to circumnavigate the relatively limited external memory bandwidth when compared with other acceleration technologies. Although this approach has been successful for applications such as deep learning, there are still many problems that would benefit from extra memory bandwidth. FPGA internal memory is fast but shallow, requiring deeper external memory to store larger datasets. This can limit what applications are suitable for FPGA acceleration. The HBM2 variant of Intel’s Stratix 10 devices, called Stratix 10 MX provide a near order of magnitude performance boost to deep external memory, enabling new algorithms to be explored for FPGA acceleration. These devices also provide an improvement in programmability, reducing the need for complex caching or data re-ordering typically required to extract maximum performance from the FPGA’s onboard memory.
This presentation suggests new application areas where Intel’s HBM2 enabled FPGAs can be successful beyond what is currently possible, including how OpenCL portability is also improved in some cases. |
id | cern-2691450 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2019 |
record_format | invenio |
spelling | cern-26914502022-11-02T22:24:40Zhttp://cds.cern.ch/record/2691450engDe Matteis, TizianoChamberlain, RichardCharacterizing Performance Benefits of HBM2 on Intel Stratix 10 FPGAsIXPUG 2019 Annual Conference at CERNother events or meetings<!--HTML-->Suitable applications for FPGAs have traditionally been those whose architecture permit significant reuse of the on-chip memory to circumnavigate the relatively limited external memory bandwidth when compared with other acceleration technologies. Although this approach has been successful for applications such as deep learning, there are still many problems that would benefit from extra memory bandwidth. FPGA internal memory is fast but shallow, requiring deeper external memory to store larger datasets. This can limit what applications are suitable for FPGA acceleration. The HBM2 variant of Intel’s Stratix 10 devices, called Stratix 10 MX provide a near order of magnitude performance boost to deep external memory, enabling new algorithms to be explored for FPGA acceleration. These devices also provide an improvement in programmability, reducing the need for complex caching or data re-ordering typically required to extract maximum performance from the FPGA’s onboard memory. This presentation suggests new application areas where Intel’s HBM2 enabled FPGAs can be successful beyond what is currently possible, including how OpenCL portability is also improved in some cases.oai:cds.cern.ch:26914502019 |
spellingShingle | other events or meetings De Matteis, Tiziano Chamberlain, Richard Characterizing Performance Benefits of HBM2 on Intel Stratix 10 FPGAs |
title | Characterizing Performance Benefits of HBM2 on Intel Stratix 10 FPGAs |
title_full | Characterizing Performance Benefits of HBM2 on Intel Stratix 10 FPGAs |
title_fullStr | Characterizing Performance Benefits of HBM2 on Intel Stratix 10 FPGAs |
title_full_unstemmed | Characterizing Performance Benefits of HBM2 on Intel Stratix 10 FPGAs |
title_short | Characterizing Performance Benefits of HBM2 on Intel Stratix 10 FPGAs |
title_sort | characterizing performance benefits of hbm2 on intel stratix 10 fpgas |
topic | other events or meetings |
url | http://cds.cern.ch/record/2691450 |
work_keys_str_mv | AT dematteistiziano characterizingperformancebenefitsofhbm2onintelstratix10fpgas AT chamberlainrichard characterizingperformancebenefitsofhbm2onintelstratix10fpgas AT dematteistiziano ixpug2019annualconferenceatcern AT chamberlainrichard ixpug2019annualconferenceatcern |