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LHC-ATLAS Phase-1 upgrade: Firmware validation for real time digital processing for new trigger readout system of the Liquid Argon calorimeter

The LHC-ATLAS Run3 experiment will be started from 2021 under high luminosity and high energy environment. In such a circumstance, an effective trigger system is required to handle the Run3 experiment. ATLAS uses a two-stage trigger system. The first stage trigger system (Level 1 trigger) is based o...

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Detalles Bibliográficos
Autor principal: Oishi, Reiyo
Lenguaje:eng
Publicado: 2020
Materias:
Acceso en línea:http://cds.cern.ch/record/2710263
Descripción
Sumario:The LHC-ATLAS Run3 experiment will be started from 2021 under high luminosity and high energy environment. In such a circumstance, an effective trigger system is required to handle the Run3 experiment. ATLAS uses a two-stage trigger system. The first stage trigger system (Level 1 trigger) is based on hardware, and the second stage is software-based high-level trigger on a PC farm. With this system, an overall trigger rate is required to be suppressed to 1 kHz or less from the bunch-crossing rate of 40 MHz. In the liquid argon (LAr) calorimeter level 1 trigger system, supercells, which are trigger readouts with high granularity by a factor of 10 compared to the one in Run2, are introduced to suppress background from jets. By measuring shower shape thanks to higher granularity, the electrons and photons trigger rate can be suppressed sufficiently. To process all data from the supercells, new readout boards are prepared and one of them is called LATOME, which converts ADC data to transverse energy with fixed latency and sends 3 types of energies to the Level 1 trigger system. The trigger system uses computed energies with LATOME firmware, therefore the development and validation of the LATOME firmware are important for the ATLAS data acquisition system. One of the LATOME firmware module, User Code, calculates the transverse energy for all supercells. To make sure all the User Code blocks are functional, firmware validations are required. These firmware validation schemes with simulation and onboard are presented with the LATOME firmware design.