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Formal verification of floating-point hardware design: a mathematical approach
| Autores principales: | , |
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| Lenguaje: | eng |
| Publicado: |
Springer
2018
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/2710675 |
| _version_ | 1780965135622340608 |
|---|---|
| author | Russinoff, David M Moore, J Strother |
| author_facet | Russinoff, David M Moore, J Strother |
| author_sort | Russinoff, David M |
| collection | CERN |
| id | cern-2710675 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 2018 |
| publisher | Springer |
| record_format | invenio |
| spelling | cern-27106752021-04-21T18:10:15Zhttp://cds.cern.ch/record/2710675engRussinoff, David MMoore, J StrotherFormal verification of floating-point hardware design: a mathematical approachComputing and ComputersSpringeroai:cds.cern.ch:27106752018 |
| spellingShingle | Computing and Computers Russinoff, David M Moore, J Strother Formal verification of floating-point hardware design: a mathematical approach |
| title | Formal verification of floating-point hardware design: a mathematical approach |
| title_full | Formal verification of floating-point hardware design: a mathematical approach |
| title_fullStr | Formal verification of floating-point hardware design: a mathematical approach |
| title_full_unstemmed | Formal verification of floating-point hardware design: a mathematical approach |
| title_short | Formal verification of floating-point hardware design: a mathematical approach |
| title_sort | formal verification of floating-point hardware design: a mathematical approach |
| topic | Computing and Computers |
| url | http://cds.cern.ch/record/2710675 |
| work_keys_str_mv | AT russinoffdavidm formalverificationoffloatingpointhardwaredesignamathematicalapproach AT moorejstrother formalverificationoffloatingpointhardwaredesignamathematicalapproach |