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Analog front-end characterization of the RD53A chip

For the Phase-2 upgrade of ATLAS and CMS tracking detectors, a new pixel readout chip, with a 50\,$\mu$m $\times$ 50\,$\mu$m pixel size, is being designed in 65 nm CMOS technology by the RD53 collaboration. A large-scale demonstrator chip called RD53A, containing design variations in the pixel matr...

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Autor principal: Emriskova, Natalia
Lenguaje:eng
Publicado: 2019
Materias:
Acceso en línea:https://dx.doi.org/10.22323/1.370.0021
http://cds.cern.ch/record/2713737
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author Emriskova, Natalia
author_facet Emriskova, Natalia
author_sort Emriskova, Natalia
collection CERN
description For the Phase-2 upgrade of ATLAS and CMS tracking detectors, a new pixel readout chip, with a 50\,$\mu$m $\times$ 50\,$\mu$m pixel size, is being designed in 65 nm CMOS technology by the RD53 collaboration. A large-scale demonstrator chip called RD53A, containing design variations in the pixel matrix, among which are three different analog front-ends, is now available. A dedicated program of testing and detailed characterization has been devised and carried out to qualify the three front-ends in terms of key performance parameters for the operation of a pixel detector at High Luminosity LHC.
id cern-2713737
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2019
record_format invenio
spelling cern-27137372022-01-14T14:55:19Zdoi:10.22323/1.370.0021http://cds.cern.ch/record/2713737engEmriskova, NataliaAnalog front-end characterization of the RD53A chipDetectors and Experimental TechniquesFor the Phase-2 upgrade of ATLAS and CMS tracking detectors, a new pixel readout chip, with a 50\,$\mu$m $\times$ 50\,$\mu$m pixel size, is being designed in 65 nm CMOS technology by the RD53 collaboration. A large-scale demonstrator chip called RD53A, containing design variations in the pixel matrix, among which are three different analog front-ends, is now available. A dedicated program of testing and detailed characterization has been devised and carried out to qualify the three front-ends in terms of key performance parameters for the operation of a pixel detector at High Luminosity LHC.For the Phase-2 upgrade of ATLAS and CMS tracking detectors, a new pixel detector readout chip, with a 50 μm × 50 μm pixel size, is being designed in 65 nm CMOS technology by the RD53 collaboration. A large-scale demonstrator chip called RD53A, is now available. The RD53A chip was designed to withstand a total ionizing dose of 500 Mrad, to operate at thresholds below 1000 e$^-$, with a noise occupancy below 10 $^{-6}$ and to cope with a hit rate up to 3 GHz cm $^{-2}$ . It contains design variations in the pixel matrix, among which are three different analog front-ends. A dedicated program of testing and detailed characterization has been devised and carried out to qualify the three front-ends. The key performance parameters for the operation of a pixel detector at High Luminosity LHC, against which the three circuits have been evaluated, are the amount of spurious hits in the detector, caused by the noise and the late hits and the dead time driven by time-over-threshold calibration.CMS-CR-2019-202oai:cds.cern.ch:27137372019-10-10
spellingShingle Detectors and Experimental Techniques
Emriskova, Natalia
Analog front-end characterization of the RD53A chip
title Analog front-end characterization of the RD53A chip
title_full Analog front-end characterization of the RD53A chip
title_fullStr Analog front-end characterization of the RD53A chip
title_full_unstemmed Analog front-end characterization of the RD53A chip
title_short Analog front-end characterization of the RD53A chip
title_sort analog front-end characterization of the rd53a chip
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.22323/1.370.0021
http://cds.cern.ch/record/2713737
work_keys_str_mv AT emriskovanatalia analogfrontendcharacterizationoftherd53achip