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Design Recipes for FPGAs: Using Verilog and VHDL
| Autor principal: | |
|---|---|
| Lenguaje: | eng |
| Publicado: |
Newnes
2011
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/2726192 |
| _version_ | 1780966101691138048 |
|---|---|
| author | Wilson, Peter |
| author_facet | Wilson, Peter |
| author_sort | Wilson, Peter |
| collection | CERN |
| id | cern-2726192 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 2011 |
| publisher | Newnes |
| record_format | invenio |
| spelling | cern-27261922021-04-21T18:07:06Zhttp://cds.cern.ch/record/2726192engWilson, PeterDesign Recipes for FPGAs: Using Verilog and VHDLXXNewnesoai:cds.cern.ch:27261922011 |
| spellingShingle | XX Wilson, Peter Design Recipes for FPGAs: Using Verilog and VHDL |
| title | Design Recipes for FPGAs: Using Verilog and VHDL |
| title_full | Design Recipes for FPGAs: Using Verilog and VHDL |
| title_fullStr | Design Recipes for FPGAs: Using Verilog and VHDL |
| title_full_unstemmed | Design Recipes for FPGAs: Using Verilog and VHDL |
| title_short | Design Recipes for FPGAs: Using Verilog and VHDL |
| title_sort | design recipes for fpgas: using verilog and vhdl |
| topic | XX |
| url | http://cds.cern.ch/record/2726192 |
| work_keys_str_mv | AT wilsonpeter designrecipesforfpgasusingverilogandvhdl |