A 4-Channel 10-Gbps/ch CMOS VCSEL Array Driver with on-chip Charge Pumps

We present the design and test results of a 4-channel 10-Gbps/ch Vertical-Cavity Surface-Emitting Laser array driver, the cpVLAD. With on-chip charge-pumps to extend the biasing headroom for the VCSELs needed for low temperature operation and mitigation of the radiation effects. The cpVLAD was fabri...

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Detalles Bibliográficos
Autores principales: Huang, X., Gong, D., Sun, Q., Chen, C., Guo, D., Hou, S., Huang, G., Kulis, S., Liu, C., Liu, T., Moreira, P., Rodríguez, A. Sánchez, Sun, H., Troska, J., Xiao, L., Zhang, L., Zhang, W., Ye, Jingbo
Lenguaje:eng
Publicado: SISSA 2020
Materias:
physics.ins-det
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.22323/1.370.0048
http://cds.cern.ch/record/2731979
Descripción
Sumario:We present the design and test results of a 4-channel 10-Gbps/ch Vertical-Cavity Surface-Emitting Laser array driver, the cpVLAD. With on-chip charge-pumps to extend the biasing headroom for the VCSELs needed for low temperature operation and mitigation of the radiation effects. The cpVLAD was fabricated in a 65-nm CMOS technology. The test results show that the cpVLAD is capable of driving VCSELs with forward bias voltages as high as 2.8 V from a 2.5 V power supply. The power consumption of the cpVLAD is 94 mW/ch.

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