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A novel quad-channel 10 Gbps CMOS VCSEL array driver with integrated charge pumps
We present a novel design and the test results of a 4-channel driver for an array of Vertical-Cavity Surface-Emitting Lasers (VCSELs). This ASIC, named cpVLAD and fabricated in a 65 nm CMOS technology, has on-chip charge pumps and is for data rates up to 10 Gbps per channel. The charge pumps are imp...
| Autores principales: | , , , , , , , , , , , , , , , , |
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| Lenguaje: | eng |
| Publicado: |
2020
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/15/12/T12004 http://cds.cern.ch/record/2745000 |
| _version_ | 1780968670748475392 |
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| author | Huang, X. Gong, D. Guo, D. Hou, S. Huang, G. Kulis, S. Liu, C. Liu, T. Moreira, P. Rodríguez, A. Sánchez Sun, H. Sun, Q. Troska, J. Xiao, L. Zhang, L. Zhang, W. Ye, J. |
| author_facet | Huang, X. Gong, D. Guo, D. Hou, S. Huang, G. Kulis, S. Liu, C. Liu, T. Moreira, P. Rodríguez, A. Sánchez Sun, H. Sun, Q. Troska, J. Xiao, L. Zhang, L. Zhang, W. Ye, J. |
| author_sort | Huang, X. |
| collection | CERN |
| description | We present a novel design and the test results of a 4-channel driver for an array of Vertical-Cavity Surface-Emitting Lasers (VCSELs). This ASIC, named cpVLAD and fabricated in a 65 nm CMOS technology, has on-chip charge pumps and is for data rates up to 10 Gbps per channel. The charge pumps are implemented to address the issue of voltage margin of the VCSEL driving stage in the applications under low temperature and harsh radiation environment. Test results indicate that cpVLAD is capable of driving VCSELs with forward voltages of up to 2.8 V using 1.2 V and 2.5 V power supplies with a power consumption of 94 mW/channel. |
| id | cern-2745000 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 2020 |
| record_format | invenio |
| spelling | cern-27450002022-04-15T02:14:59Zdoi:10.1088/1748-0221/15/12/T12004http://cds.cern.ch/record/2745000engHuang, X.Gong, D.Guo, D.Hou, S.Huang, G.Kulis, S.Liu, C.Liu, T.Moreira, P.Rodríguez, A. SánchezSun, H.Sun, Q.Troska, J.Xiao, L.Zhang, L.Zhang, W.Ye, J.A novel quad-channel 10 Gbps CMOS VCSEL array driver with integrated charge pumpsphysics.ins-detDetectors and Experimental TechniquesWe present a novel design and the test results of a 4-channel driver for an array of Vertical-Cavity Surface-Emitting Lasers (VCSELs). This ASIC, named cpVLAD and fabricated in a 65 nm CMOS technology, has on-chip charge pumps and is for data rates up to 10 Gbps per channel. The charge pumps are implemented to address the issue of voltage margin of the VCSEL driving stage in the applications under low temperature and harsh radiation environment. Test results indicate that cpVLAD is capable of driving VCSELs with forward voltages of up to 2.8 V using 1.2 V and 2.5 V power supplies with a power consumption of 94 mW/channel.arXiv:2011.00298oai:cds.cern.ch:27450002020-10-31 |
| spellingShingle | physics.ins-det Detectors and Experimental Techniques Huang, X. Gong, D. Guo, D. Hou, S. Huang, G. Kulis, S. Liu, C. Liu, T. Moreira, P. Rodríguez, A. Sánchez Sun, H. Sun, Q. Troska, J. Xiao, L. Zhang, L. Zhang, W. Ye, J. A novel quad-channel 10 Gbps CMOS VCSEL array driver with integrated charge pumps |
| title | A novel quad-channel 10 Gbps CMOS VCSEL array driver with integrated charge pumps |
| title_full | A novel quad-channel 10 Gbps CMOS VCSEL array driver with integrated charge pumps |
| title_fullStr | A novel quad-channel 10 Gbps CMOS VCSEL array driver with integrated charge pumps |
| title_full_unstemmed | A novel quad-channel 10 Gbps CMOS VCSEL array driver with integrated charge pumps |
| title_short | A novel quad-channel 10 Gbps CMOS VCSEL array driver with integrated charge pumps |
| title_sort | novel quad-channel 10 gbps cmos vcsel array driver with integrated charge pumps |
| topic | physics.ins-det Detectors and Experimental Techniques |
| url | https://dx.doi.org/10.1088/1748-0221/15/12/T12004 http://cds.cern.ch/record/2745000 |
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