System-on-chip security: validation and verification

Detalles Bibliográficos
Autores principales: Farahmandi, Farimah, Huang, Yuanwen, Mishra, Prabhat, Saqib, Fareena, Plusquellic, Jim
Lenguaje:eng
Publicado: Springer International Publishing AG 2019
Materias:
XX
Acceso en línea:http://cds.cern.ch/record/2756604
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author Farahmandi, Farimah
Huang, Yuanwen
Mishra, Prabhat
Saqib, Fareena
Plusquellic, Jim
author_facet Farahmandi, Farimah
Huang, Yuanwen
Mishra, Prabhat
Saqib, Fareena
Plusquellic, Jim
author_sort Farahmandi, Farimah
collection CERN
id cern-2756604
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2019
publisher Springer International Publishing AG
record_format invenio
spelling cern-27566042021-04-21T16:41:51Zhttp://cds.cern.ch/record/2756604engFarahmandi, FarimahHuang, YuanwenMishra, PrabhatSaqib, FareenaPlusquellic, JimSystem-on-chip security: validation and verificationXXSpringer International Publishing AGoai:cds.cern.ch:27566042019
spellingShingle XX
Farahmandi, Farimah
Huang, Yuanwen
Mishra, Prabhat
Saqib, Fareena
Plusquellic, Jim
System-on-chip security: validation and verification
title System-on-chip security: validation and verification
title_full System-on-chip security: validation and verification
title_fullStr System-on-chip security: validation and verification
title_full_unstemmed System-on-chip security: validation and verification
title_short System-on-chip security: validation and verification
title_sort system-on-chip security: validation and verification
topic XX
url http://cds.cern.ch/record/2756604
work_keys_str_mv AT farahmandifarimah systemonchipsecurityvalidationandverification
AT huangyuanwen systemonchipsecurityvalidationandverification
AT mishraprabhat systemonchipsecurityvalidationandverification
AT saqibfareena systemonchipsecurityvalidationandverification
AT plusquellicjim systemonchipsecurityvalidationandverification

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