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Secure processors part I: background, taxonomy for secure enclaves and Intel SGX architecture
| Autores principales: | , , |
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| Lenguaje: | eng |
| Publicado: |
Now Publishers
2017
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/2762190 |
| _version_ | 1780970659651780608 |
|---|---|
| author | Costan, Victor Lebedev, Ilia Devadas, Srinivas |
| author_facet | Costan, Victor Lebedev, Ilia Devadas, Srinivas |
| author_sort | Costan, Victor |
| collection | CERN |
| id | cern-2762190 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 2017 |
| publisher | Now Publishers |
| record_format | invenio |
| spelling | cern-27621902021-04-21T16:39:13Zhttp://cds.cern.ch/record/2762190engCostan, VictorLebedev, IliaDevadas, SrinivasSecure processors part I: background, taxonomy for secure enclaves and Intel SGX architectureXXNow Publishersoai:cds.cern.ch:27621902017 |
| spellingShingle | XX Costan, Victor Lebedev, Ilia Devadas, Srinivas Secure processors part I: background, taxonomy for secure enclaves and Intel SGX architecture |
| title | Secure processors part I: background, taxonomy for secure enclaves and Intel SGX architecture |
| title_full | Secure processors part I: background, taxonomy for secure enclaves and Intel SGX architecture |
| title_fullStr | Secure processors part I: background, taxonomy for secure enclaves and Intel SGX architecture |
| title_full_unstemmed | Secure processors part I: background, taxonomy for secure enclaves and Intel SGX architecture |
| title_short | Secure processors part I: background, taxonomy for secure enclaves and Intel SGX architecture |
| title_sort | secure processors part i: background, taxonomy for secure enclaves and intel sgx architecture |
| topic | XX |
| url | http://cds.cern.ch/record/2762190 |
| work_keys_str_mv | AT costanvictor secureprocessorspartibackgroundtaxonomyforsecureenclavesandintelsgxarchitecture AT lebedevilia secureprocessorspartibackgroundtaxonomyforsecureenclavesandintelsgxarchitecture AT devadassrinivas secureprocessorspartibackgroundtaxonomyforsecureenclavesandintelsgxarchitecture |