Cargando…

Secure processors part II: Intel SGX security analysis and MIT Sanctum architecture

Detalles Bibliográficos
Autores principales:	Costan, Victor, Lebedev, Ilia, Devadas, Srinivas
Lenguaje:	eng
Publicado:	Now Publishers 2017
Materias:	XX
Acceso en línea:	http://cds.cern.ch/record/2762191

Ejemplares similares

Secure processors part I: background, taxonomy for secure enclaves and Intel SGX architecture
por: Costan, Victor, et al.
Publicado: (2017)

A Distributed Oracle Using Intel SGX for Blockchain-Based IoT Applications
por: Woo, Sangyeon, et al.
Publicado: (2020)

Principles of secure processor architecture design
por: Szefer, Jakub, et al.
Publicado: (2018)

eTPM: A Trusted Cloud Platform Enclave TPM Scheme Based on Intel SGX Technology
por: Sun, Haonan, et al.
Publicado: (2018)

Intel Quad Core Processor
Publicado: (2017)

The foundations of the SGX bdg at Point 5.
por: Margot Frenot
Publicado: (2000)

Evaluation of the Intel Westmere-EP server processor
por: Jarp, S, et al.
Publicado: (2010)

Evaluation of the Intel Nehalem-EX server processor
por: Jarp, S, et al.
Publicado: (2010)

Evaluation of the Intel Westmere-EX server processor
por: Jarp, S, et al.
Publicado: (2011)

Multicloud Architecture Migration and Security
por: Gil, Laurent
Publicado: (2019)

Security for Service Oriented Architectures
por: Williams, Walter
Publicado: (2014)

Adaptive Security Management Architecture
por: Tiller, James
Publicado: (2010)

Security and Microservice Architecture on AWS
por: Raje, Gaurav
Publicado: (2021)

Platform embedded security technology revealed : safeguarding the future of computing with Intel embedded security and management engine
por: Ruan, Xiaoyu
Publicado: (2014)

Evaluation of the Intel Sandy Bridge-EP server processor
por: Jarp, S, et al.
Publicado: (2012)

Intel Core 2 Duo Processor E6600
Publicado: (2017)

Towards the Internet of Things: architectures, security, and applications
por: Jabraeil Jamali, Mohammad Ali, et al.
Publicado: (2019)

Does the Intel Xeon Phi processor fit HEP workloads?
por: Nowak, Andrzej, et al.
Publicado: (2014)

Multi-threaded ATLAS simulation on Intel Knights Landing processors
por: Farrell, Steven, et al.
Publicado: (2017)

Multi-threaded ATLAS Simulation on Intel Knights Landing Processors
por: Farrell, Steven, et al.
Publicado: (2016)

Computer security - ESORICS 2019: 24th European symposium on research in computer security, Luxembourg, September 23-27, 2019, proceedings, part II
por: Sako, Kazue, et al.
Publicado: (2019)

Parallelizing and Optimizing LHCb-Kalman for Intel Xeon Phi KNL Processors
por: Fernández, Plácido, et al.
Publicado: (2018)

CMSSW Performance Monitoring on processors based on the Intel Core and Nehalem Microarchitectures
por: Kruse, Daniele Francesco
Publicado: (2011)

Understanding HPC Benchmark Performance on Intel Broadwell and Cascade Lake Processors
por: Alappat, Christie L., et al.
Publicado: (2020)

Intel trusted execution technology for server platforms: a guide to more secure datacenters
por: Futral, William T, et al.
Publicado: (2013)

Computer security: 23rd European symposium on research in computer security, ESORICS 2018, Barcelona, Spain, September 3-7, 2018, proceedings, part II
por: Lopez, Javier, et al.
Publicado: (2018)

Computer security - ESORICS 2016: 21st European symposium on research in computer security, Heraklion, Greece, September 26-30, 2016, proceedings, part II
por: Askoxylakis, Ioannis, et al.
Publicado: (2016)

Computer security - ESORICS 2014: 19th European symposium on research in computer security, Wroclaw, Poland, September 7-11, 2014 proceedings, part II
por: Kutylowski, Miroslaw, et al.
Publicado: (2014)

Techno security's guide to securing SCADA
por: Wiles, Jack, et al.
Publicado: (2007)

Mastering Assembly programming: from instruction set to kernel module with Intel processor
por: Lyashko, Alexey
Publicado: (2017)

Intel Xeon Phi processor high performance programming: knights landing edition
por: Jeffers, James, et al.
Publicado: (2016)

Optimizing Applications for Multi-Core Processors: Using the Intel Integrated Performance Primitives
por: Taylor, Stewart
Publicado: (2007)

Intel threading building blocks: outfitting C++ for multi-vore processor parallelism
por: Reinders, James
Publicado: (2007)

The Intel microprocessors: architecture, programming, and interfacing
por: Brey, Barry B
Publicado: (1997)

Intel premiata dal CERN
Publicado: (2008)

Security and privacy in communication networks: 15th EAI international conference, SecureComm 2019, Orlando, FL, USA, October 23-25, 2019, proceedings, part II
por: Chen, Songqing, et al.
Publicado: (2019)

Reconfigurable architectures and design automation tools for application-level network security
por: Mühlbach, Sascha
Publicado: (2015)

EMI Security Architecture
por: White, J., et al.
Publicado: (2013)

Network security architectures
por: Convery, Sean
Publicado: (2004)

Securing systems: applied security architecture and threat models
por: Schoenfield, Brook S E
Publicado: (2015)

Cannot write session to /tmp/vufind_sessions/sess_vtks4koslpdtj6ubs2ursrlsb2