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Testing of the Micromegas detector trigger electronics for the New Small Wheel Phase I upgrade of ATLAS detector

In conjunction with the High Luminosity upgrade of the LHC, the ATLAS detector is also undergoing an upgrade to handle the significantly higher data rates. The muon end-cap system upgrade in ATLAS, lies with the replacement of the Small Wheel. The New Small Wheel (NSW) is expected to combine high tr...

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Detalles Bibliográficos
Autor principal: Tzanos, Stamatios
Lenguaje:eng
Publicado: 2021
Materias:
Acceso en línea:http://cds.cern.ch/record/2771911
Descripción
Sumario:In conjunction with the High Luminosity upgrade of the LHC, the ATLAS detector is also undergoing an upgrade to handle the significantly higher data rates. The muon end-cap system upgrade in ATLAS, lies with the replacement of the Small Wheel. The New Small Wheel (NSW) is expected to combine high tracking precision with upgraded information for the Level-1 trigger. To accomplish this, small Thin Gap Chamber (sTGC) and MicroMegas (MicroMesh Gaseous Structure) detector technologies are being deployed. The Micromegas detector technology is equipped with three types of electronic boards to produce trigger signals and track muons. These boards are the Micromegas Front End with 8 VMM chips (MMFE8), the Level 1 Data Driver Card (L1DDC) and the ART Data Driver Card (ADDC). The Address in Real Time (ART) signals produced by the MMFE8s are propagated through the ADDC and sent to the Micromegas Trigger Processor for the decision of the Level 1 Accept (L1A) trigger signal. In order to test the functionality and efficiency of the trigger electronics, various tests are being conducted at building 899 (BB5). During the "Micromegas ART connectivity test", internal test pulses are sent through the trigger electronics to simulate ART hits from the MMFE8s to the Trigger Processor. This test is performed to validate every New Small Wheel Micromegas double wedge and is essential to identify ADDC boards or fibers that must be replaced, tested or repaired. MMFE8 and L1DDC issues can also be identified. Finally, the trigger processor's data acquisition, firmware and trigger logic are being tested with cosmics data. In this poster, the various tests and results from cosmics data are presented.