FAST2: a new family of front-end ASICs to read out thin Ultra-Fast Silicon detectors achieving picosecond time resolution.

<!--HTML-->We present the first results obtained with the FAST2 family of ASICs. The FAST2 ASIC family, designed in the 110 nm CMOS technology, has been optimized for the read-out of Ultra-Fast Silicon Detectors, aiming to achieve a combined total time resolution of less than 40 ps. In the FAS...

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Detalles Bibliográficos
Autores principales: Ferrero, Marco, Martinez Rojas, Alejandro David
Lenguaje:eng
Publicado: 2021
Materias:
Conferences
Acceso en línea:http://cds.cern.ch/record/2781966
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author Ferrero, Marco
Martinez Rojas, Alejandro David
author_facet Ferrero, Marco
Martinez Rojas, Alejandro David
author_sort Ferrero, Marco
collection CERN
description <!--HTML-->We present the first results obtained with the FAST2 family of ASICs. The FAST2 ASIC family, designed in the 110 nm CMOS technology, has been optimized for the read-out of Ultra-Fast Silicon Detectors, aiming to achieve a combined total time resolution of less than 40 ps. In the FAST2 family, the ASIC (FAST2_A) presents 16 channels and has only the amplification stage with a timing jitter lower than 16 ps experimentally, and power dissipation of 1 mW/ch.
id cern-2781966
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2021
record_format invenio
spelling cern-27819662022-11-02T22:02:15Zhttp://cds.cern.ch/record/2781966engFerrero, MarcoMartinez Rojas, Alejandro DavidFAST2: a new family of front-end ASICs to read out thin Ultra-Fast Silicon detectors achieving picosecond time resolution.TWEPP 2021 Topical Workshop on Electronics for Particle PhysicsConferences<!--HTML-->We present the first results obtained with the FAST2 family of ASICs. The FAST2 ASIC family, designed in the 110 nm CMOS technology, has been optimized for the read-out of Ultra-Fast Silicon Detectors, aiming to achieve a combined total time resolution of less than 40 ps. In the FAST2 family, the ASIC (FAST2_A) presents 16 channels and has only the amplification stage with a timing jitter lower than 16 ps experimentally, and power dissipation of 1 mW/ch.oai:cds.cern.ch:27819662021
spellingShingle Conferences
Ferrero, Marco
Martinez Rojas, Alejandro David
FAST2: a new family of front-end ASICs to read out thin Ultra-Fast Silicon detectors achieving picosecond time resolution.
title FAST2: a new family of front-end ASICs to read out thin Ultra-Fast Silicon detectors achieving picosecond time resolution.
title_full FAST2: a new family of front-end ASICs to read out thin Ultra-Fast Silicon detectors achieving picosecond time resolution.
title_fullStr FAST2: a new family of front-end ASICs to read out thin Ultra-Fast Silicon detectors achieving picosecond time resolution.
title_full_unstemmed FAST2: a new family of front-end ASICs to read out thin Ultra-Fast Silicon detectors achieving picosecond time resolution.
title_short FAST2: a new family of front-end ASICs to read out thin Ultra-Fast Silicon detectors achieving picosecond time resolution.
title_sort fast2: a new family of front-end asics to read out thin ultra-fast silicon detectors achieving picosecond time resolution.
topic Conferences
url http://cds.cern.ch/record/2781966
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AT martinezrojasalejandrodavid fast2anewfamilyoffrontendasicstoreadoutthinultrafastsilicondetectorsachievingpicosecondtimeresolution
AT ferreromarco twepp2021topicalworkshoponelectronicsforparticlephysics
AT martinezrojasalejandrodavid twepp2021topicalworkshoponelectronicsforparticlephysics

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