FPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHC

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<!--HTML-->The FELIX system is used as an interface between front-end electronics and commodity hardware in the server farm. FELIX is using RDMA through RoCE to transmit data from its host servers to the Software Readout Driver using off-the-shelf networking equipment. RDMA communication is im...

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Autor principal: Vasile, Matei
Lenguaje:eng
Publicado: 2021
Materias:
Conferences
Acceso en línea:http://cds.cern.ch/record/2782328
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author Vasile, Matei
author_facet Vasile, Matei
author_sort Vasile, Matei
collection CERN
description <!--HTML-->The FELIX system is used as an interface between front-end electronics and commodity hardware in the server farm. FELIX is using RDMA through RoCE to transmit data from its host servers to the Software Readout Driver using off-the-shelf networking equipment. RDMA communication is implemented using software on both end of the links. Exploring opportunities to improve data throughput as part of the High Luminosity LHC upgrade, an implementation for RDMA support in the front-end FELIX FPGA is being developed. We present a proof-of-concept RDMA FPGA implementation, which will help inform the design of the FELIX platform for High Luminosity LHC.
id cern-2782328
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2021
record_format invenio
spelling cern-27823282022-11-02T22:02:14Zhttp://cds.cern.ch/record/2782328engVasile, MateiFPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHCTWEPP 2021 Topical Workshop on Electronics for Particle PhysicsConferences<!--HTML-->The FELIX system is used as an interface between front-end electronics and commodity hardware in the server farm. FELIX is using RDMA through RoCE to transmit data from its host servers to the Software Readout Driver using off-the-shelf networking equipment. RDMA communication is implemented using software on both end of the links. Exploring opportunities to improve data throughput as part of the High Luminosity LHC upgrade, an implementation for RDMA support in the front-end FELIX FPGA is being developed. We present a proof-of-concept RDMA FPGA implementation, which will help inform the design of the FELIX platform for High Luminosity LHC.oai:cds.cern.ch:27823282021
spellingShingle Conferences
Vasile, Matei
FPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHC
title FPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHC
title_full FPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHC
title_fullStr FPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHC
title_full_unstemmed FPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHC
title_short FPGA implementation of RDMA for ATLAS Readout with FELIX in High Luminosity LHC
title_sort fpga implementation of rdma for atlas readout with felix in high luminosity lhc
topic Conferences
url http://cds.cern.ch/record/2782328
work_keys_str_mv AT vasilematei fpgaimplementationofrdmaforatlasreadoutwithfelixinhighluminositylhc
AT vasilematei twepp2021topicalworkshoponelectronicsforparticlephysics

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