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The Prototype Hardware Design and Test of Global Common Module for Global Trigger System of the ATLAS Phase II Upgrade

<!--HTML-->The HL-LHC will start operations in 2027, to deliver more than ten times the integrated luminosity of the LHC Runs 1-3 combined. Meeting these requirements poses significant challenges to the hardware design of the Trigger and Data Acquisition system. Global Trigger is a new subsyst...

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Detalles Bibliográficos
Autor principal: Bonini, Filiberto
Lenguaje:eng
Publicado: 2021
Materias:
Acceso en línea:http://cds.cern.ch/record/2782404
Descripción
Sumario:<!--HTML-->The HL-LHC will start operations in 2027, to deliver more than ten times the integrated luminosity of the LHC Runs 1-3 combined. Meeting these requirements poses significant challenges to the hardware design of the Trigger and Data Acquisition system. Global Trigger is a new subsystem, which will perform offline-like algorithms on full-granularity calorimeter data. The hardware implementation of the Global Trigger consists of three primary components: Multiplexer Processor layer, Global Event Processing layer, and demultiplexing Global-to-CTP Interface, all of which have identical hardware. The single Global Common Module hardware is implemented across the Global Trigger system.