Prototype Hardware Design and Testing of the Global Common Module for the Global Trigger Subsystem of the ATLAS Phase-II Upgrade

The high-luminosity large hadron collider (HL-LHC) will deliver more than ten times the integrated luminosity of the previous runs combined. Meeting its stricter requirements poses significant challenges to the Trigger and Data Acquisition (TDAQ) systems of the LHC experiments. Introduced in the framework of the ATLAS experiment's Phase-II Upgrade, the Global Trigger (GT) is a new subsystem which will perform offline-like algorithms on full-granularity calorimeter data. The implementation of the GT's functionality is firmware-focused and is composed of three layers: Multiplexing (or Data Aggregating), Global Event Processing, and demultiplexing interface to the Central Trigger Processor. Each layer will be composed of several, similar nodes, and will be hosted on replicas of identical hardware, the Global Common Module (GCM), an ATCA front board which will be adopted throughout the entire GT subsystem. This article proceeds from the TWEPP 2021 conference and presents the GCM hardware design, performed in 2020, and focuses on the results of its extensive testing performed in 2021.