The ATLAS Muon Trigger System for the High Luminosity LHC

To preserve the acceptance of critical signatures for physics in the increased particle rates, integrated radiation, and pile-up conditions of the High Luminosity the HL-LHC runs, the Trigger and Readout System of the ATLAS Muon Spectrometer must maintain low-momentum trigger thresholds in an acceptable trigger rate. This leads to an increase of the trigger rate and latency to 1MHz and 10μs, respectively, so that more complex trigger algorithms than in the present system can be implemented. That trigger scheme imposes the replacement of the current readout and trigger electronics, which accommodate a maximum rate of 100 kHz with a maximum latency of up to 3 μs. This paper presents the new muon hardware trigger architecture that exploits the Muon Spectrometer’s upgraded trigger and readout electronics, focusing on the new data collection and transmission electronics (DCT) of the Resistive Plate Chambers (RPC) trigger detector technology. The DCT boards implement the LPGBT optical link to handle data bandwidth up to 10.24 Gb/s. Due to the importance of the DCT system, the complexity of the signals it handles, and the large number of boards required (1570 DCTs), an automated test station will be developed to evaluate the performance of all its functionalities. Presented are the architecture and measurement results of a test bench developed to evaluate the DCT's optical link LpGBT by implementing its backend counterpart (lpGBTFPGA core). Since the DCT prototype is under irradiation tests, for the assessment of the lpGBT-FPGA a methodology has been implemented by using development boards and modifying the alternative of the LPGBT ASIC (lpGBT-Emulator). The successful operation of the above testing setup renders feasible indispensable implementations towards the complete validation of the functionalities of the DCT (or of any board that implements the LPGBT).