CMOS technology study for pixelated particle detectors under high hit rate and high radiative dose

The Inner Tracker (ITk) system of the ATLAS experiment will be upgraded for the 2026 High Luminosity Large Hadron Collider (HL-LHC) run. The HL-LHC will operate with a center of mass energy of 14 TeV and a peak instantaneous luminosity of 7.5×10$^{34}$ cm$^{−2}$ s$^{-1}$, five times higher than at present. The increased luminosity will result in roughly ten times higher radiation levels and data rates. To cope with the ATLAS requirements in terms of radiation hardness, readout speed and granularity at the HL-LHC, the replacement of the present ATLAS Inner Tracker (ITk) is needed. The ATLAS ITk Pixel Detector will consist in a 5-layer cylinder and endcaps equipped with silicon detector. The hybrid-pixel detector technology is chosen as baseline for this ITk Pixel Detector upgrade. While an alternative option exists for the pixel detector upgrade: a fully monolithic depleted-CMOS Pixel Detector technology. In this case, the sensor and the full readout electronic circuitry are integrated into the same silicon volume in a single chip. In addition to a potential for material reduction, one important advantage of this approach relates to the use of a standard commercial process, which enables low cost and potentially easy procurement. Furthermore, the use of a monolithic concept translates in simpler production steps (no bump-bonding), savings in cost and with lower risk. Three prototypes of silicon detectors have been developed using LFoundry 150 nm CMOS technology process: CCPD_LF, LF_CPIX and LF-MONOPIX1. CCPD_LF is the first prototype chip with a size of 5 mm × 5 mm produced in this technology. Based on the promising results of CCPD_LF, a larger size demonstrator sensor chip (LF_CPIX) was developed with various improved pixel types designed to have high in-time detection efficiency for minimum ionizing particle tracks, good pixel uniformity, before and after irradiation. Since CCPD_LF and LF_CPIX were developed to improve the sensor and analog front end circuitry parts, there was very little read-out logic inside the chip. The LF-MONOPIX1 chip is the first fully monolithic prototype implemented in LFoundry technology by our collaboration. It inherits the analog and sensor parts of LF_CPIX chip, and integrates them with a fast readout logic. The work presented here shows the TCAD simulation for the sensor guard ring optimization and characterization for these three prototypes, with contributions concerning the setup development, $^{55}$Fe and $^{90}$Sr sources calibration, modifications of the FPGA firmware. Several test programs were developed for injection and threshold scans and threshold tuning. A main concern was the investigation on the radiation hardness for both the electronics and the sensor parts. In order to make the setup compatible to the radiation facility, a new setup was developed for remote control and monitoring. One radiation campaign in 2017 and 5 two more in 2018 were performed for LF_CPIX prototypes and LF-MONOPIX1 prototypes, respectively. We will show results concerning characterizations for these prototypes in the laboratory at CPPM, as well as results in multiple radiation campaigns performed at the 24 GeV IRRAD proton facility at CERN, to study the effects of Non-Ionizing Energy Loss (NIEL) and Total Ionizing Dose (TID) on the prototypes.