Experimental verification of thermal model for PCB mounted MOSFETs used on parallel H-bridge structures

The upgrade of the Large Hadron Collider (LHC) towards the High Luminosity-LHC (HL-LHC) presents different challenges, among them, the upgrade of the power converters associated to the inner triplet magnets to reach the required nominal current of 18 kA. In order to reach this current and to accomplish the stringent requirements associated to this kind of application, even under a fault scenario, redundancy and modularity are foreseen in the converter design. Consequently, the development of a 18 kA/$±$10 V power converter built from $N$ parallel-connected sub-converters, each having $M$ modules inside is carried out. As part of this development, a thermal model for the selection of the switching devices was proposed and evaluated by simulations. This model takes into consideration the PCB characteristics and thermal interfaces that impact on the heat dissipation through the board. In this work, the proposed thermal model is validated by means of experimental tests over a 225 A H-bridge prototype.