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FELIX: readout upgrade for the ATLAS Trigger DAQ system in HL-LHC

The High Luminosity LHC will start to operate from LHC Run 4 2029, and will see the ATLAS experiment operating in an increasingly harsh collision environment. This has motivated a series of upgrades, to be installed during the long experimental shutdown from 2026 to 2029. One key change among these...

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Detalles Bibliográficos
Autor principal: Wu, Mengqing
Lenguaje:eng
Publicado: 2022
Materias:
Acceso en línea:http://cds.cern.ch/record/2810955
Descripción
Sumario:The High Luminosity LHC will start to operate from LHC Run 4 2029, and will see the ATLAS experiment operating in an increasingly harsh collision environment. This has motivated a series of upgrades, to be installed during the long experimental shutdown from 2026 to 2029. One key change among these is the upgrade of the Front-End Link eXchange (FELIX) system, which was developed to improve the capacity and flexibility of the detector readout system for selected ATLAS system in LHC Run 3 (2022). After the Run 4 upgrade, all ATLAS systems will be read out via the FELIX system, with sub-detector specific processing taking place in a common software processing framework. The FELIX system functions as a router between custom serial links from front-end ASICs and FPGAs to data collection and processing components via a commodity switched network, while also forwarding TTC signals to front-end electronics. FELIX uses commodity server technology hosting FPGA-based PCIe I/O cards transferring data to a software routing platform in connected to a high-bandwidth switched network. Commodity servers connected to FELIX systems via the same network run newly developed multi-threaded 'Data Handler' infrastructure for event fragment building, buffering and detector-specific processing to facilitate online selection. One major upgrade challenge for the system in Run 4 is to support the higher trigger rate, which increases from 100 kHz in Run 3 to 1 MHz in Run 4, along with an overall increase in event size. This presentation will cover the FELIX design for Run 4, as well as the results of a series of performance tests carried out with Run 3 hardware at Run 4 rates, which will inform the next stages of development.