The ITk interlock hardware portection system

For the upgrade of the Large Hadron Collider to the High-Luminosity Large Hadron Collider (HL-LHC) the ATLAS detector will install a new Inner Tracker (ITk), which consists completely of silicon detectors. Although di erent technologies were chosen for the inner and outer part, the major risk for all silicon detectors are heat-ups, which can cause irreparable damages. As, once the detector is installed, detector elements are not accessible for several years or even for the lifetime of the detector, such damages must be avoided by all means. The ITk interlock system is a hardwired safety system, it acts as last line of defense and is designed to protect the sensitive detector elements against upcoming risks. The core of the interlock system consists of distributed FPGAs, housing the interlock matrix decision tables. They collect signals from interlock protected devices and distribute signals onto interlock controlled units (e.g. power supplies). Additionally, signals from external systems can be integrated. To keep the number of detector elements, which are out of operation, at a minimum, the power supplies are controlled with a high granularity. The resulting large number of channels also explains why no commercial solution was selected. We report from the concept to the realization.