Development of the PreProcessor Modules for the Upgrade of the ATLAS Tile Calorimeter Towards the HL-LHC

The Tile Calorimeter (TileCal) is the central hadronic calorimeter of the ATLAS experiment at the Large Hadron Collider (LHC). The LHC will undergo a series of upgrades towards a High Luminosity LHC (HL-LHC) in 2025-2028. The ATLAS TileCal Phase-II Upgrade is planned in order to accommodate the detector and data acquisition system to the HL-LHC requirements. In the upgraded readout architecture, the on-detector readout electronics will transmit detector data to the PreProcessors (PPr) in the counting rooms for every bunch crossing (~25 ns). The new readout system will require a total data bandwidth of 40 Tbps. The PPr boards will transmit calibrated energy and time per cell to the first level of the ATLAS trigger system through the Trigger and Data Acquisition interface system, and trigger selected event data to the Front End LInk eXchange (FELIXs) system. In addition, the PPr boards will be responsible for the distribution of the LHC clock towards the on-detector electronics for the sampling of the PMT signals. A total of 32 PPr boards will be required to read out the entire calorimeter during the HL-LHC, where each PPr board will be composed of four Compact Processing Module and an ATCA carrier. The design of hardware, firmware and software components of the final PreProcessor modules for the ATLAS Tile Calorimeter will be presented. The results and experiences obtained from the first integration tests are discussed, as well as the plans for the production, validation and installation of the PreProcessor modules during the ATLAS Phase-II Upgrade.