Development of the PreProcessor Modules for the Upgrade of the ATLAS Tile Calorimeter Towards the High-Luminosity LHC

The Tile Calorimeter (TileCal) is the central hadronic calorimeter of the ATLAS experiment at the Large Hadron Collider (LHC). During the Long Shutdown 3 (LS3) in 2026-2029, the LHC will undergo a series of upgrades towards a High Luminosity LHC (HL-LHC) to deliver an instantaneous luminosity 5 to 7 times the current nominal LHC luminosity. The ATLAS TileCal Phase-II Upgrade will take place during the LS3 in order to accommodate the detector and data acquisition system to the HL-LHC requirements. The on- and off-detector electronics of TileCal will be completely replaced using a new readout strategy with new interfaces to the full-digital ATLAS trigger system to process more complex physics events while maintaining the trigger efficiency. In the upgraded readout architecture, the on-detector readout electronics will transmit detector data to the PreProcessors (PPr) in the counting rooms for every bunch crossing (~25 ns). The new readout system will require a total data bandwidth of 40 Tbps for the complete read out of the calorimeter. The PPr boards will transmit calibrated energy and time per cell to the first level of the ATLAS trigger system through the Trigger and DAQ interface system (TDAQi) and trigger selected event data to the Front-End LInk eXchange (FELIX) system. In addition, the PPr boards will be responsible for the distribution of the LHC clock towards the on-detector electronics for the sampling of the PMT signals. A total of 32 PPr boards will be required to read out the entire calorimeter during the HL-LHC, where each PPr board will be composed of four Compact Processing Module (CPM) and an ATCA carrier. This contribution presents the design of the final PreProcessor modules for the ATLAS Tile Calorimeter at the HL-LHC, as well as the plans for the production, validation and installation of the PreProcessor modules during the ATLAS Phase-II Upgrade.