FPGA implementation of RDMA for ATLAS readout with FELIX at high luminosity LHC

The FELIX system is used as an interface between front-end electronics and commodity hardware in the server farm. FELIX is using RDMA through RoCE to transmit data from its host servers to the software readout driver using off-the-shelf networking equipment. RDMA communication is implemented using s...

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Detalles Bibliográficos
Autores principales: Vasile, M, Martoiu, S, Boukadida, N, Antonescu, M, Ulmamei, A, Stoicea, G, Hobincu, R, Iordache, C
Lenguaje:eng
Publicado: 2022
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/17/05/C05022
http://cds.cern.ch/record/2836513
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author Vasile, M
Martoiu, S
Boukadida, N
Antonescu, M
Ulmamei, A
Stoicea, G
Hobincu, R
Iordache, C
author_facet Vasile, M
Martoiu, S
Boukadida, N
Antonescu, M
Ulmamei, A
Stoicea, G
Hobincu, R
Iordache, C
author_sort Vasile, M
collection CERN
description The FELIX system is used as an interface between front-end electronics and commodity hardware in the server farm. FELIX is using RDMA through RoCE to transmit data from its host servers to the software readout driver using off-the-shelf networking equipment. RDMA communication is implemented using software on both end of the links. Exploring opportunities to improve data throughput as part of the high luminosity LHC upgrade, an implementation for RDMA support in the front-end FELIX FPGA is being developed. We present a proof-of-concept RDMA FPGA implementation, which will help inform the design of the FELIX platform for high luminosity LHC.
id cern-2836513
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2022
record_format invenio
spelling cern-28365132022-10-12T19:16:26Zdoi:10.1088/1748-0221/17/05/C05022http://cds.cern.ch/record/2836513engVasile, MMartoiu, SBoukadida, NAntonescu, MUlmamei, AStoicea, GHobincu, RIordache, CFPGA implementation of RDMA for ATLAS readout with FELIX at high luminosity LHCDetectors and Experimental TechniquesThe FELIX system is used as an interface between front-end electronics and commodity hardware in the server farm. FELIX is using RDMA through RoCE to transmit data from its host servers to the software readout driver using off-the-shelf networking equipment. RDMA communication is implemented using software on both end of the links. Exploring opportunities to improve data throughput as part of the high luminosity LHC upgrade, an implementation for RDMA support in the front-end FELIX FPGA is being developed. We present a proof-of-concept RDMA FPGA implementation, which will help inform the design of the FELIX platform for high luminosity LHC.oai:cds.cern.ch:28365132022
spellingShingle Detectors and Experimental Techniques
Vasile, M
Martoiu, S
Boukadida, N
Antonescu, M
Ulmamei, A
Stoicea, G
Hobincu, R
Iordache, C
FPGA implementation of RDMA for ATLAS readout with FELIX at high luminosity LHC
title FPGA implementation of RDMA for ATLAS readout with FELIX at high luminosity LHC
title_full FPGA implementation of RDMA for ATLAS readout with FELIX at high luminosity LHC
title_fullStr FPGA implementation of RDMA for ATLAS readout with FELIX at high luminosity LHC
title_full_unstemmed FPGA implementation of RDMA for ATLAS readout with FELIX at high luminosity LHC
title_short FPGA implementation of RDMA for ATLAS readout with FELIX at high luminosity LHC
title_sort fpga implementation of rdma for atlas readout with felix at high luminosity lhc
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.1088/1748-0221/17/05/C05022
http://cds.cern.ch/record/2836513
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