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Global Trigger Versatile Module for ATLAS Phase-II upgrade
ATLAS detector at the Large Hadron Collider (LHC) will undergo a major Phase-II upgrade for the High Luminosity LHC (HL-LHC). The upgrade affects all the main ATLAS systems including the Trigger and Data Acquisition. As part of the Level-0 Trigger System, the Global Trigger uses full-granularity cal...
Autores principales: | , , , , |
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Lenguaje: | eng |
Publicado: |
2022
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Acceso en línea: | http://cds.cern.ch/record/2836657 |
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author | Filimonov, Viacheslav Bauss, Bruno Buescher, Volker Schaefer, Uli Ta, Duc Bao |
author_facet | Filimonov, Viacheslav Bauss, Bruno Buescher, Volker Schaefer, Uli Ta, Duc Bao |
author_sort | Filimonov, Viacheslav |
collection | CERN |
description | ATLAS detector at the Large Hadron Collider (LHC) will undergo a major Phase-II upgrade for the High Luminosity LHC (HL-LHC). The upgrade affects all the main ATLAS systems including the Trigger and Data Acquisition. As part of the Level-0 Trigger System, the Global Trigger uses full-granularity calorimeter cells to perform algorithms, refines the L0Calo trigger objects and applies topological requirements. The Global Trigger uses a Global Common Module (GCM) as a building block of its design. An additional Global Trigger Versatile Module (GVM) has been designed according to the Global Trigger hardware specifications. To achieve a high input and output bandwidth and substantial processing power, both the GVM and the GCM host the most advanced FPGAs and optical modules, running at high data rates (up to 28 Gb/s) as well as other hardware resources needed for the Global Trigger. The GVM acts as an auxiliary hardware component that can be used for development, testing and operational purposes within and beyond the Global Trigger. The GVM is designed in an ATCA form factor with the possibility of a standalone operation. The main building blocks are the following: one large processing FPGA (Xilinx Ultrascale+ VU13P), up to eight Finisar BOA modules for real-time data path, one Finisar BOA module for interface to Front-End Link eXchange (FELIX) system, one UltraZed board with Zynq UltraScale+, one IPM Controller (IPMC), one FPGA power mezzanine and two DDR4 RAMs. In order to optimize the signal integrity for the high-speed signals, dedicated high-speed PCB design techniques, such as physical and spacing constraints, phase tuning, micro and buried vias, were used. Successful results demonstrating a good performance of the on-board components have been obtained. The poster will provide a hardware overview and measurement results of the GVM. |
id | cern-2836657 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2022 |
record_format | invenio |
spelling | cern-28366572022-10-13T19:32:19Zhttp://cds.cern.ch/record/2836657engFilimonov, ViacheslavBauss, BrunoBuescher, VolkerSchaefer, UliTa, Duc BaoGlobal Trigger Versatile Module for ATLAS Phase-II upgradeParticle Physics - ExperimentATLAS detector at the Large Hadron Collider (LHC) will undergo a major Phase-II upgrade for the High Luminosity LHC (HL-LHC). The upgrade affects all the main ATLAS systems including the Trigger and Data Acquisition. As part of the Level-0 Trigger System, the Global Trigger uses full-granularity calorimeter cells to perform algorithms, refines the L0Calo trigger objects and applies topological requirements. The Global Trigger uses a Global Common Module (GCM) as a building block of its design. An additional Global Trigger Versatile Module (GVM) has been designed according to the Global Trigger hardware specifications. To achieve a high input and output bandwidth and substantial processing power, both the GVM and the GCM host the most advanced FPGAs and optical modules, running at high data rates (up to 28 Gb/s) as well as other hardware resources needed for the Global Trigger. The GVM acts as an auxiliary hardware component that can be used for development, testing and operational purposes within and beyond the Global Trigger. The GVM is designed in an ATCA form factor with the possibility of a standalone operation. The main building blocks are the following: one large processing FPGA (Xilinx Ultrascale+ VU13P), up to eight Finisar BOA modules for real-time data path, one Finisar BOA module for interface to Front-End Link eXchange (FELIX) system, one UltraZed board with Zynq UltraScale+, one IPM Controller (IPMC), one FPGA power mezzanine and two DDR4 RAMs. In order to optimize the signal integrity for the high-speed signals, dedicated high-speed PCB design techniques, such as physical and spacing constraints, phase tuning, micro and buried vias, were used. Successful results demonstrating a good performance of the on-board components have been obtained. The poster will provide a hardware overview and measurement results of the GVM.ATL-DAQ-SLIDE-2022-543oai:cds.cern.ch:28366572022-10-13 |
spellingShingle | Particle Physics - Experiment Filimonov, Viacheslav Bauss, Bruno Buescher, Volker Schaefer, Uli Ta, Duc Bao Global Trigger Versatile Module for ATLAS Phase-II upgrade |
title | Global Trigger Versatile Module for ATLAS Phase-II upgrade |
title_full | Global Trigger Versatile Module for ATLAS Phase-II upgrade |
title_fullStr | Global Trigger Versatile Module for ATLAS Phase-II upgrade |
title_full_unstemmed | Global Trigger Versatile Module for ATLAS Phase-II upgrade |
title_short | Global Trigger Versatile Module for ATLAS Phase-II upgrade |
title_sort | global trigger versatile module for atlas phase-ii upgrade |
topic | Particle Physics - Experiment |
url | http://cds.cern.ch/record/2836657 |
work_keys_str_mv | AT filimonovviacheslav globaltriggerversatilemoduleforatlasphaseiiupgrade AT baussbruno globaltriggerversatilemoduleforatlasphaseiiupgrade AT bueschervolker globaltriggerversatilemoduleforatlasphaseiiupgrade AT schaeferuli globaltriggerversatilemoduleforatlasphaseiiupgrade AT taducbao globaltriggerversatilemoduleforatlasphaseiiupgrade |