Sector Logic Development for the ATLAS Level-0 Muon Trigger at HL-LHC

The design of the Sector Logic (SL) for the ATLAS Level-0 muon trigger at HL-LHC and the milestones achieved on the hardware and firmware developments are presented. The first prototype of the SL board was produced, and all the functions have been demonstrated and confirmed. Fast tracking using Thin Gap Chamber (TGC) hits, a core part of the Level-0 muon trigger, has been developed for full coverage of the endcaps and the performance was confirmed with post-synthesis simulations. The processing has been demonstrated for the TGC hits from ~7000 channels using single XCVU13P FPGA within ~100 ns.