Hough transform implementation on FPGA for event filtering of HL-LHC

The ATLAS experiment plans to upgrade its Trigger DAQ system dedicated to HL-LHC. Due to the expected large amount of data, one of the key upgrades is how to filter the events in a short time. Part of the filtering is performed based on calorimeter and muon spectrometer information, and then further event filtering is done in the Event Filter (EF) system with data including ones from the inner tracker (ITk). From the ITk, O($10^{5-6}$) clusters are expected per beam-crossing. Within those clusters, EF needs to perform regional tracking at 1 MHz. In this report, we will introduce one of the proposals for this event filtering using an FPGA based solution. In this setup, we adopt a hough transform algorithm on FPGA to filter the cluster candidates associated with the track. The algorithm has been implemented on the VC709 board which features a Virtex-7 FPGA. In order to evaluate its performance, we used simulated hit clusters from a single muon event under 200 of the pileup events. Compared to the previous study, resource utilization is reduced down to 8\%, while keeping inefficiency within 6.5\%.