Electronics for the far-forward CMS muon detector upgrade, ME0

With the High Luminosity upgrade of the Large Hadron Collider (LHC) we expect increased instantaneous luminosities up to $5 \times 10^{34} \text{cm}^{-2} \text{s}^{-1}$, or five times more than the original values. In order to maintain performance of the Compact Muon Solenoid (CMS) experiment under these conditions, ME0 is one of three new muon sub-detectors being added, along with GE1/1 and GE2/1, which use the triple Gas Electron Multiplier (GEM) technology. ME0 is designed to cover the forward region of $2.0<\lvert\eta\rvert<2.8$, thus improving muon reconstruction at high background rates by supplementing other overlapping muon subsystems up to $\lvert\eta\rvert=2.4$, while also extending the acceptance for the first time to $\lvert\eta\rvert=2.8$. The readout electronics for ME0 must be designed to accommodate high data rates and be sufficiently radiation hard to operate close to the beamline. The Optohybrid (OH) board for ME0, which reads out data from the front-end VFAT3b ASICs, has therefore been designed to operate without an FPGA (unlike GE1/1 and GE2/1) to ensure radiation hardness. The ME0 OH uses the radiation-hard CERN-designed lpGBT ASIC and VTRx+ optical transceiver module for high bandwidth optical links up to 10.24 Gb/s. The backend system is based on the ATCA standard. The design and development status of the readout electronics for ME0 is presented, along with recent results from integration tests performed using the first prototypes.