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A transimpedance amplifier using a novel current mode feedback loop

We present a transimpedance amplifier stage based on a novel current mode feedback topology. This circuit employs NMOS and PMOS transistors exclusively and requires neither capacitor for stabilizing the transimpedance loop nor resistor for the transresistance feedback and transistor loading. This am...

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Detalles Bibliográficos
Autores principales: Anghinolfi, Francis, Dabrowski, W, Delagnes, E, Jarron, Pierre, Scharfetter, L H H
Lenguaje:eng
Publicado: 1995
Materias:
Acceso en línea:http://cds.cern.ch/record/284274
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author Anghinolfi, Francis
Dabrowski, W
Delagnes, E
Jarron, Pierre
Scharfetter, L H H
author_facet Anghinolfi, Francis
Dabrowski, W
Delagnes, E
Jarron, Pierre
Scharfetter, L H H
author_sort Anghinolfi, Francis
collection CERN
description We present a transimpedance amplifier stage based on a novel current mode feedback topology. This circuit employs NMOS and PMOS transistors exclusively and requires neither capacitor for stabilizing the transimpedance loop nor resistor for the transresistance feedback and transistor loading. This amplifier circuit is fully compatible with submicron digital CMOS processes. The active feedback network consists of two grounded-gate MOS devices which split the output current in both the feedback and output branches. The transresistance and the phase margin are adjustable through external DC signals. The measured rise time of the impulse response of the amplifier implemented in an industrial 0,7µm CMOS process is 18 ns for a transresistance of 180 k‡ and 30 ns for a transresistance of 560 k‡. The measured Equivalent Noise Charge (ENC) is 800 rms e¯ for an input capacitance of 20 pF with the transresistance adjusted to 560 k‡.
id cern-284274
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 1995
record_format invenio
spelling cern-2842742019-09-30T06:29:59Zhttp://cds.cern.ch/record/284274engAnghinolfi, FrancisDabrowski, WDelagnes, EJarron, PierreScharfetter, L H HA transimpedance amplifier using a novel current mode feedback loopDetectors and Experimental TechniquesWe present a transimpedance amplifier stage based on a novel current mode feedback topology. This circuit employs NMOS and PMOS transistors exclusively and requires neither capacitor for stabilizing the transimpedance loop nor resistor for the transresistance feedback and transistor loading. This amplifier circuit is fully compatible with submicron digital CMOS processes. The active feedback network consists of two grounded-gate MOS devices which split the output current in both the feedback and output branches. The transresistance and the phase margin are adjustable through external DC signals. The measured rise time of the impulse response of the amplifier implemented in an industrial 0,7µm CMOS process is 18 ns for a transresistance of 180 k‡ and 30 ns for a transresistance of 560 k‡. The measured Equivalent Noise Charge (ENC) is 800 rms e¯ for an input capacitance of 20 pF with the transresistance adjusted to 560 k‡.CERN-ECP-95-10CERN-ECP-95-010oai:cds.cern.ch:2842741995-05-18
spellingShingle Detectors and Experimental Techniques
Anghinolfi, Francis
Dabrowski, W
Delagnes, E
Jarron, Pierre
Scharfetter, L H H
A transimpedance amplifier using a novel current mode feedback loop
title A transimpedance amplifier using a novel current mode feedback loop
title_full A transimpedance amplifier using a novel current mode feedback loop
title_fullStr A transimpedance amplifier using a novel current mode feedback loop
title_full_unstemmed A transimpedance amplifier using a novel current mode feedback loop
title_short A transimpedance amplifier using a novel current mode feedback loop
title_sort transimpedance amplifier using a novel current mode feedback loop
topic Detectors and Experimental Techniques
url http://cds.cern.ch/record/284274
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