Signal generation and acquisition platform for a stretched-wire Beam position Monitor test bench

The goal of this thesis was to develop new electronics for an existing test bench to calibrate BPMs. The existing electronics were thereby replaced by a state of the art Xilinx MPSoC. More precisely the Zynq UltraScale+ RFSoC ZCU111, that features eight high speed ADCs and DACs inside its chip. The test-bench works by creating a signal at a variable frequency that is outputted on a small wire. This wire is threaded through a BPM and the received signal at each electrode is measured. To obtain the Sensitivity of a BPM the wire is moved to different positions inside the BPM and a measurement is performed. The measurements are normalised using a Delta-Sigma-Normalisation that will result in the required characteristics for the BPM, the Sensitivity and the Offset. The board is working as a measurement device performing a s21-parameter measurement. Therefore a signal is generated inside the chip at an adjustable frequency of up to 1 GHz. This is achieved using a CORDIC algorithm to calculate the required sine values on the go instead of storing them inside a LUT. The received signal is processed using the Goertzel algorithm to calculate exactly one bin of a DFT, namely the frequency bin at which the sought frequency lies. Signal generation and acquisition are performed inside the FPGA of the ZCU111. To handle the communication with the LabView software, a simple SCPI parser has been developed and implemented over the USB interface. Out of the measurements with the new and old setup, it can be clearly seen, that the instrument developed in this thesis outperforms the old VNA that has been used to take measurements before. Additionally it adds the possibility to perform eight electrode measurements simultaneously, while before only two were possible at a time. This makes the test bench more intuitive as well as speeds up the measurement process by a factor of at least 2.5