TDCpix pixel detector ASIC with 100 ps time stamping

The TDCpix pixel read-out ASIC contains 1800 pixels arranged in 40 columns and 45 rows with the dimension of 300μm x 300μm. Each pixel contains a preamplifier and shaper circuit with a dynamic range of 0.8 to 10 fC and a rise time of 5 ns, followed by a Leading-Edge discriminator with Time-over-Threshold correction. The discriminator outputs of each pixel are connected to time-to-digital converters (TDC) measuring the time when the input signal has exceeded the threshold and the pulse width with a binning of 97 ps. The electronics noise of pre-amplifier/shaper is 170 e− or 2.7 mV rms with a gain of 65 mV/fC. The jitter of the entire processing chain for an electrical input signal of 2.4 fC is lower than 60 ps rms. The ASIC has been designed to work in radiated environments of 6 * 104 Gray per year and 2 x 1014 1 MeV neutron equivalent cm−2.