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Design and readout architecture of a monolithic binary active pixel sensor in TPSCo 65 nm CMOS imaging technology
The Digital Pixel Test Structure (DPTS) is a monolithic active pixel sensor prototype chip designed to explore the TPSCo 65 nm ISC process in the framework of the CERN-EP R&D; on monolithic sensors and the ALICE ITS3 upgrade. It features a 32 × 32 binary pixel matrix at 15 μm pitch with event-dr...
Autores principales: | , , , , , , , , , , , , , , , , , , , , , , , , , , , , , |
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Lenguaje: | eng |
Publicado: |
2023
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/18/02/C02025 http://cds.cern.ch/record/2861835 |